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Custom IC Design

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  • Discussion

    Insufficient memory to continue{MMSIM12}.

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 649 views
  • Discussion

    SPEF file comparison for Calibre xRC and StarRC

    Category: Custom IC Design

    By frasheed frasheed

    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 17526 views
  • Discussion

    RVE CN command equivalent to PVS

    Category: Custom IC Design

    By jorenrefuerzo jorenrefuerzo

    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 13990 views
  • Discussion

    Bind key to change Path end type(ex:extend,truncate,round,variable)

    Category: Custom IC Design

    By KarthikJaiho KarthikJaiho

    •

    updated over 11 years ago by KarthikJaiho

    2 replies • 1547 views
  • Discussion

    Importing .gds file in virtuoso

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    updated over 11 years ago by RFStuff

    2 replies • 14728 views
  • Discussion

    How to create layout xl for user defined pcell with same parameters as in schematic??

    Category: Custom IC Design

    By KarthikJaiho KarthikJaiho

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 12914 views
  • Discussion

    Abstract Generator : 2 layouts of a same "Memory instance" identified as "Block" and "Core" why ?

    Category: Custom IC Design

    By samung samung

    •

    updated over 11 years ago by ColinSutlieff

    1 replies • 941 views
  • Discussion

    Netlist error when simulating BSIMCMG

    Category: Custom IC Design

    By Chen23 Chen23

    •

    updated over 11 years ago by Chen23

    1 replies • 15522 views
  • Discussion

    ABSTRACT GENERATOR : absSelectCell for a multi-cells Library, syntax ?

    Category: Custom IC Design

    By samung samung

    •

    updated over 11 years ago by samung

    2 replies • 13126 views
  • Discussion

    Design rules for library TSMC 0.18U CMOS 018 DEEP (6M, HV FET, S block)

    Category: Custom IC Design

    By rajrevanth61 rajrevanth61

    •

    updated over 11 years ago by ColinSutlieff

    1 replies • 16305 views
  • Discussion

    connect all the bus lines together

    Category: Custom IC Design

    By Clidre Clidre

    •

    updated over 11 years ago by FormerMember

    3 replies • 18312 views
  • Discussion

    Convergence problem in MC simulations

    Category: Custom IC Design

    By Flyyn Rider Flyyn Rider

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 12765 views
  • Discussion

    cadence virtuoso available utilities

    Category: Custom IC Design

    By auto dipper auto dipper

    •

    updated over 11 years ago by FormerMember

    7 replies • 15298 views
  • Discussion

    Bindkey to change via (ex:M1_M2 to M2_M3)

    Category: Custom IC Design

    By KarthikJaiho KarthikJaiho

    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 1185 views
  • Discussion

    PVS - Cadence Physical Verification System

    Category: Custom IC Design

    By Kovinko Kovinko

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 2106 views
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