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Functional Verification

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  • Discussion

    Support to transition coverage

    Category: Functional Verification

    By Akshayk1

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    updated over 16 years ago by StephenH

    1 replies • 14015 views
  • Discussion

    SV Coverage Sequence: Bad Pointer Access Error

    Category: Functional Verification

    By ethand

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    •

    updated over 16 years ago by Akshayk1

    1 replies • 13917 views
  • Discussion

    reversed part select index expression ordering

    Category: Functional Verification

    By linseed

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    •

    updated over 16 years ago by Shalom B

    2 replies • 24543 views
  • Discussion

    compiled eVCs not connected by e-top

    Category: Functional Verification

    By Heho

    $usertype

    •

    updated over 16 years ago by StephenH

    1 replies • 13644 views
  • Discussion

    Writing to SDRAM through Designware memory controller

    Category: Functional Verification

    By gangireddy

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    •

    started over 16 years ago

    0 replies • 13444 views
  • Discussion

    Error message during excuting ncverilog

    Category: Functional Verification

    By Galguzimara

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    •

    updated over 16 years ago by Phu Huynh

    3 replies • 24551 views
  • Discussion

    PSL

    Category: Functional Verification

    By natg9

    $usertype

    •

    updated over 16 years ago by natg9

    8 replies • 16908 views
  • Discussion

    instance based functional coverage on systemverilog classes (OVM) in vManager

    Category: Functional Verification

    By FrankE

    $usertype

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    updated over 16 years ago by DDXYZVV

    2 replies • 14949 views
  • Discussion

    hdl_path() for sys: error in specman v5.1

    Category: Functional Verification

    By Sarathi

    $usertype

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    updated over 16 years ago by StephenH

    1 replies • 14202 views
  • Discussion

    Connecting System Verilog to VHDL data type

    Category: Functional Verification

    By cpehaot

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    •

    started over 16 years ago

    0 replies • 14342 views
  • Discussion

    Gate Level simulation for Big(Huge) chip

    Category: Functional Verification

    By Brodov Dmitriy

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    •

    updated over 16 years ago by Brodov Dmitriy

    2 replies • 1927 views
  • Discussion

    SVA and IFV

    Category: Functional Verification

    By natg9

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    •

    updated over 16 years ago by StephenH

    3 replies • 14475 views
  • Discussion

    ncsim performance impact of -access +R vs +RC vs +RWC?

    Category: Functional Verification

    By cubicle82

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    •

    updated over 16 years ago by StephenH

    2 replies • 6620 views
  • Discussion

    SVA

    Category: Functional Verification

    By natg9

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    •

    updated over 16 years ago by natg9

    2 replies • 14600 views
  • Discussion

    Coverage Item

    Category: Functional Verification

    By Manish Verma

    $usertype

    •

    updated over 16 years ago by Manish Verma

    2 replies • 13892 views
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