• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Functional Verification
CDNS - double leaderboard script

Functional Verification

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    End of Test Mechanism

    Category: Functional Verification

    By MVSI MVSI

    •

    updated over 16 years ago by Hilmar

    1 replies • 12946 views
  • Discussion

    verilog divider

    Category: Functional Verification

    By andyandy andyandy

    •

    updated over 16 years ago by Shalom B

    1 replies • 13406 views
  • Discussion

    Clock Generation in NC-VHDL & NC-VERILOG

    Category: Functional Verification

    By murali418 murali418

    •

    updated over 16 years ago by murali418

    2 replies • 2278 views
  • Discussion

    how to instantiate verilog module in vhdl top level

    Category: Functional Verification

    By SUBBHAREDDY SUBBHAREDDY

    •

    updated over 16 years ago by Hilmar

    1 replies • 17276 views
  • Discussion

    writing EVC

    Category: Functional Verification

    By onkarkk onkarkk

    •

    updated over 16 years ago by onkarkk

    2 replies • 13255 views
  • Discussion

    automation of testcases

    Category: Functional Verification

    By onkarkk onkarkk

    •

    updated over 16 years ago by onkarkk

    6 replies • 14629 views
  • Discussion

    ncsim +gui debugging and breakpoints on system-tasks/functions?

    Category: Functional Verification

    By cubicle82 cubicle82

    •

    updated over 16 years ago by tpylant

    2 replies • 5749 views
  • Discussion

    String concatenation

    Category: Functional Verification

    By SpecMAN INFANT SpecMAN INFANT

    •

    updated over 16 years ago by StephenH

    7 replies • 19066 views
  • Discussion

    Systemverilog SVA question: begin/end blocks

    Category: Functional Verification

    By cubicle82 cubicle82

    •

    updated over 16 years ago by tpylant

    1 replies • 944 views
  • Discussion

    aspect oriented vs object oriented

    Category: Functional Verification

    By onkarkk onkarkk

    •

    updated over 16 years ago by onkarkk

    4 replies • 15709 views
  • Discussion

    Coverage is only

    Category: Functional Verification

    By Specman baby Specman baby

    •

    updated over 16 years ago by pjigar

    1 replies • 12788 views
  • Discussion

    Coverage result comes in grey colour

    Category: Functional Verification

    By SpecMAN INFANT SpecMAN INFANT

    •

    updated over 16 years ago by StephenH

    1 replies • 12909 views
  • Discussion

    Support to transition coverage

    Category: Functional Verification

    By Akshayk1 Akshayk1

    •

    updated over 16 years ago by StephenH

    1 replies • 13156 views
  • Discussion

    SV Coverage Sequence: Bad Pointer Access Error

    Category: Functional Verification

    By ethand ethand

    •

    updated over 16 years ago by Akshayk1

    1 replies • 13099 views
  • Discussion

    reversed part select index expression ordering

    Category: Functional Verification

    By linseed linseed

    •

    updated over 16 years ago by Shalom B

    2 replies • 23371 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information