Mixed-Signal Design

Latest Posts

Discussion

Problem Simulating Verilog-AMS top cellview

Category: Mixed-Signal Design

By GabrielB
•
updated over 10 years ago by Andrew Beckett

2 replies • 15307 views
Discussion

About the driving ability of digital circuits in spectreVerilog simulation.

Category: Mixed-Signal Design

By xxgenerall
•
updated over 11 years ago by xxgenerall

5 replies • 14048 views
Discussion

netlist differences

Category: Mixed-Signal Design

By Ram123
•
updated over 11 years ago by Ram123

2 replies • 13154 views
Discussion

Pin labels in Virtuoso from Encounter OA

Category: Mixed-Signal Design

By nevsan
•
updated over 11 years ago by nevsan

5 replies • 16457 views
Discussion

How to instantiate models in verilog-A

Category: Mixed-Signal Design

By rajrevanth61
•
started over 11 years ago

0 replies • 12843 views
Discussion

Verilog-a model instantiation

Category: Mixed-Signal Design

By rajrevanth61
•
started over 11 years ago

0 replies • 13666 views
Discussion

error while running ADL

Category: Mixed-Signal Design

By johannah
•
updated over 11 years ago by Andrew Beckett

1 replies • 13124 views
Discussion

bus value export to table

Category: Mixed-Signal Design

By Bob Mounger
•
updated over 11 years ago by Bob Mounger

1 replies • 13234 views
Discussion

NanoRoute crash with incremental tech libraries in mixed signal flow

Category: Mixed-Signal Design

By nevsan
•
updated over 11 years ago by nevsan

2 replies • 13426 views
Discussion

Signal names in Print DC Operating Points

Category: Mixed-Signal Design

By HassanSyed
•
updated over 11 years ago by HassanSyed

2 replies • 13277 views
Discussion

AMS ncvlog error

Category: Mixed-Signal Design

By ahmed osama
•
updated over 11 years ago by Andrew Beckett

2 replies • 17786 views
Discussion

Forcing Analog nodes in AMS simulation

Category: Mixed-Signal Design

By designguy
•
updated over 11 years ago by Andrew Beckett

1 replies • 14633 views
Discussion

Model parameters

Category: Mixed-Signal Design

By ag2888
•
updated over 11 years ago by Arjun RP

13 replies • 22563 views
Discussion

Ask for help: how to do the ac stability simulation for fully-differential Op-Amp using with switched-capacitors?

Category: Mixed-Signal Design

By chensiw12
•
updated over 11 years ago by Andrew Beckett

2 replies • 15153 views
Discussion

cadence running slow in ubuntu

Category: Mixed-Signal Design

By Darshak
•
updated over 11 years ago by Andrew Beckett

3 replies • 14745 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.