• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Mixed-Signal Design
CDNS - double leaderboard script

Mixed-Signal Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    Inserting electrical to real connect modules automatically

    Category: Mixed-Signal Design

    By abdulahadk

    $usertype

    •

    updated over 12 years ago by abdulahadk

    2 replies • 18655 views
  • Discussion

    Step a bus signal from ADE-XL design variable

    Category: Mixed-Signal Design

    By daasboe

    $usertype

    •

    updated over 12 years ago by daasboe

    2 replies • 15432 views
  • Discussion

    error during IE generation(mixed signal simulation)

    Category: Mixed-Signal Design

    By RAMYA1

    $usertype

    •

    updated over 12 years ago by Andrew Beckett

    4 replies • 3463 views
  • Discussion

    Simulating and retrieving MOS currents

    Category: Mixed-Signal Design

    By Mike59

    $usertype

    •

    updated over 12 years ago by Isto

    1 replies • 13785 views
  • Discussion

    Changing the simulation temp from a task

    Category: Mixed-Signal Design

    By Teeeravis

    $usertype

    •

    updated over 12 years ago by Andrew Beckett

    2 replies • 14267 views
  • Discussion

    translating psf files into SST2 files(simvision)

    Category: Mixed-Signal Design

    By VenkatAMS

    $usertype

    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 2619 views
  • Discussion

    Handling rc/encounter generated pins in virtuoso

    Category: Mixed-Signal Design

    By glennramalho

    $usertype

    •

    updated over 12 years ago by grasshopper

    4 replies • 1806 views
  • Discussion

    Differences between pins from digital and analog views of a schematic

    Category: Mixed-Signal Design

    By glennramalho

    $usertype

    •

    updated over 12 years ago by glennramalho

    3 replies • 16493 views
  • Discussion

    Mixed-Signal simulations on FPGA using batch file

    Category: Mixed-Signal Design

    By aliasnikhil

    $usertype

    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 13857 views
  • Discussion

    Export LEF via problem

    Category: Mixed-Signal Design

    By Gangadhar Redd

    $usertype

    •

    updated over 12 years ago by AndreasLenz

    1 replies • 14279 views
  • Discussion

    How could I do PSS and Pnoise analysis by the AMS simulator in ADE?

    Category: Mixed-Signal Design

    By IEEE Chairman

    $usertype

    •

    updated over 12 years ago by Andrew Beckett

    5 replies • 16680 views
  • Discussion

    UVM-MS verification library

    Category: Mixed-Signal Design

    By KBragin

    $usertype

    •

    started over 13 years ago

    0 replies • 5437 views
  • Discussion

    writing out a .vcd file from spectre

    Category: Mixed-Signal Design

    By geezmaneti

    $usertype

    •

    updated over 13 years ago by geezmaneti

    8 replies • 20853 views
<

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information