• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      eDave
      eDave 60 Points
    • 2
      MZ20250602835
      MZ20250602835 51 Points
    • 3
      Aurel B
      Aurel B 41 Points
    • 4
      steve
      steve 40 Points
    • 4
      ShawnLogan
      ShawnLogan 40 Points
  • Leaderboard

    • 1
      steve
      steve 17,769 Points
    • 2
      oldmouldy
      oldmouldy 13,705 Points
    • 3
      eDave
      eDave 10,331 Points
    • 4
      ShawnLogan
      ShawnLogan 9,710 Points
    • 5
      skillUser
      skillUser 7,498 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    Create script print pdf and rename

    Category: Allegro X PCB Editor

    By Eugene Yeoh

    •

    updated over 7 years ago by Eugene Yeoh

    3 replies • 14817 views
  • Discussion

    how to run skill script from csh

    Category: Custom IC Design

    By qkoyote

    •

    updated over 7 years ago by qkoyote

    3 replies • 16408 views
  • Discussion

    Advantages of High Speed Option?

    Category: PCB Design

    By aemeehan

    •

    updated over 7 years ago by redwire

    2 replies • 14829 views
  • Discussion

    Post-simulation error

    Category: Custom IC Design

    By tahm

    •

    updated over 7 years ago by Andrew Beckett

    3 replies • 15802 views
  • Discussion

    How to use a component (VerilogA) within a .scs model file to drive output signals

    Category: Custom IC Design

    By MT13

    •

    updated over 7 years ago by MT13

    7 replies • 18566 views
  • Discussion

    Recommended method of defining generic microvia padstack

    Category: PCB Design

    By aricbeaver

    •

    updated over 7 years ago by aricbeaver

    6 replies • 18761 views
  • Discussion

    ERROR (SFE-23): "input.scs" 19: X0 is an instance of an undefined model f_opAmp.

    Category: Custom IC Design

    By Jaisal

    •

    updated over 7 years ago by Nicolas Callens

    1 replies • 2819 views
  • Discussion

    Order of pCell callback triggering

    Category: Custom IC SKILL

    By abompos

    •

    updated over 7 years ago by abompos

    2 replies • 15001 views
  • Discussion

    How do I get HAL to check on basic VHDL codes for synthesizability?

    Category: Digital Implementation

    By Ncsim User 1

    •

    started over 7 years ago

    0 replies • 13719 views
  • Discussion

    Liberate_AMS for .lib generation.

    Category: Mixed-Signal Design

    By anandmohan

    •

    updated over 7 years ago by anandmohan

    17 replies • 23972 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information