• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      OleKri
      OleKri 50 Points
    • 1
      HP20260601263
      HP20260601263 50 Points
    • 3
      avant
      avant 45 Points
    • 4
      steve
      steve 35 Points
    • 5
      RM202605273230
      RM202605273230 25 Points
  • Leaderboard

    • 1
      steve
      steve 17,859 Points
    • 2
      oldmouldy
      oldmouldy 13,830 Points
    • 3
      eDave
      eDave 10,381 Points
    • 4
      ShawnLogan
      ShawnLogan 9,725 Points
    • 5
      skillUser
      skillUser 7,518 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Answered

    Net Logic

    Category: Allegro X PCB Editor

    By Wildwpe

    •

    updated 4 months ago by Hoangkhoipcb

    14 replies • 5981 views
  • Suggested Answer

    Schematic variant to replace an 0402 capacitor to an 0402 resistor

    Category: Allegro X Capture CIS

    By ThorV

    •

    updated 4 months ago by oldmouldy

    2 replies • 645 views
  • Discussion

    Question about dynamic path behaviour, wimilar to DRD.

    Category: Custom IC SKILL

    By p94todorov

    •

    updated 4 months ago by p94todorov

    2 replies • 1540 views
  • Answered

    Installing True Type Text Fonts and adding stroke text in Orcad X 25.1

    Category: Allegro X PCB Editor

    By TomLinkECU

    •

    updated 4 months ago by Ulf K

    3 replies • 2104 views
  • Discussion

    What is the best PCB Editor Command?

    Category: Allegro X PCB Editor

    By John T

    •

    updated 4 months ago by John T

    20 replies • 4120 views
  • Discussion

    Is it possible to create a register block that contain multiple register maps with reg_verifier?

    Category: Functional Verification

    By NH202509219257

    •

    started 4 months ago

    0 replies • 1094 views
  • Discussion

    ADE Assembler – managing a large number of output expressions (file-based approach?)

    Category: Custom IC Design

    By baltaci

    •

    updated 4 months ago by Andrew Beckett

    1 replies • 1657 views
  • Suggested Answer

    Two layer vs multi-layer: Working Layer via selection does not work when routing two layers?

    Category: Allegro X PCB Editor

    By Ulf K

    •

    updated 4 months ago by Ulf K

    2 replies • 1552 views
  • Discussion

    load corners into assember

    Category: Custom IC SKILL

    By sebo94

    •

    updated 4 months ago by Andrew Beckett

    1 replies • 1490 views
  • Discussion

    SysCap – Tip of the Week: Allegro System Capture in Offline Mode

    Category: Allegro X System Capture (EE Cockpit)

    By DesignTech

    •

    updated 4 months ago by DC202601267111

    3 replies • 5219 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information