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Latest Blog Posts

  • Breakfast Bytes: What's For Breakfast? Video Preview August 7th to 11th 2017

    Paul McLellan
    Paul McLellan

    https://youtu.be/uIodpPVnsXM

     breakfast bytes logo

    Coming from Cadence cafeteria patio (camera Sean)

    Monday: Discovery of the Electron

    Tuesday: Battery Derangement Syndrome

    Wednesday: Moving Logic to the 3rd Dimension

    Thursday: I Know What the SDI in Samsung SDI Stands...

    • 31 Jul 2017
  • SoC and IP: Happy Birthday Tensilica

    PaulaJones
    PaulaJones

    Yes, it’s Tensilica’s birthday! Twenty years ago today, on July 31, 1997, Tensilica was officially incorporated by Chris Rowen, who I knew from our Synopsys days when he was VP of the Design Reuse Business Unit.  I started working with Tensilica (as a PR consultant) when there were eight people in the office next to the Duke of Edinburgh pub on Wolfe road in Cupertino. I became a Tensilica employee in 2002…

    • 31 Jul 2017
  • Breakfast Bytes: Tensilica Has the Same Birthday as Harry Potter

    Paul McLellan
    Paul McLellan

     breakfast bytes logo Tensilica LogoYou probably know that Harry Potter's birthday is July 31st. As it happens, that was the same day that Tensilica was founded. Furthermore, both started 20 years ago. The first Harry Potter book was actually published first, on June 26th 1997. On July...

    • 31 Jul 2017
  • Analog/Custom Design: Virtuosity: Handy UI Enhancements in ADE Assembler & ADE Explorer

    Arja H
    Arja H

    We have been busy working on several small UI enhancements for Assembler & Explorer that will have a big impact! In this blog, I will give you an overview of the enhancements we have made to the Results tab, Corners Setup form, and the Data View and Setup assistants.

    Detail Transpose Enhancements

    Ever wished you could see the test name in the Detail Transpose view? Well, if you are using lC6.1.7 ISR10 or a…

    • 28 Jul 2017
  • Verification: X-Propagation: Xcelium Simulator’s X-prop Technology Ensures Deterministic Reset

    XTeam
    XTeam

    All chips need to cold reset on every power-up. Warm resets, however, are a bit more complicated. Take a smartphone screen, for example. The screen may power down while the phone is idle. However, the user will want it to return to their pre-set brightness level on power-up. Chips have to be tested for multiple warm-reset scenarios, and each of these tests take a very long time.

    Enter Xcelium Simulator, and X-propagation…

    • 28 Jul 2017
  • Breakfast Bytes: The Intel Museum

    Paul McLellan
    Paul McLellan

     breakfast bytes logoDuring the summer, while the living is easy and the fish are jumping, each Friday I'll take a look at computer museum or some artifacts there. Starting this week with the one in Cadence San Jose's backyard just along Montague Expressway: The Intel Museum...

    • 28 Jul 2017
  • Verification: Moving to Xcelium Simulation? I’m Glad You Asked

    SumeetAggarwal
    SumeetAggarwal

    Ready to take the next step in simulation technology with a true third-generation engine, with multi-core technology? ­ Cadence® Xcelium™ Simulator allows you to have unprecedented control over your tests including to further tailor test sequencing to your specific hardware needs.

    Get started immediately with the new release Xcelium 17.04 by using the central page on https://support.cadence.com to learn…

    • 27 Jul 2017
  • Breakfast Bytes: Secret Key Generation with Physically Unclonable Functions

    Paul McLellan
    Paul McLellan

     breakfast bytes logoYesterday, I wrote about automotive security from a big-picture level. Today let's drop down and look at some implementation approaches from the chip level. This comes from Thomas Kallstenious, who is imec's program director for security. At the imec...

    • 27 Jul 2017
  • Verification: ROHM CO., Ltd Adopts Our Functional Safety Verification Solution

    XTeam
    XTeam

    On July 17, 2017, Cadence announced that the Cadence® Functional Safety Verification Solution had been adopted by ROHM CO., Ltd as part of its deisgn flow for ISO 26262-compliant ICs and LSIs for the automotive market. Cadence fault simulation tech can quickly and easily deal with the complexities around many types of faults, including single event transient (SET), stuck-at-0 or 1, dual-point faults, and more. It also…

    • 26 Jul 2017
  • System, PCB, & Package Design : Empowering Learning: New Learning – Cadence Allegro and OrCAD Release17.2-2016

    Jasmine
    Jasmine

    Interested in an easy-to-use, collaborative, and robust design-environment that reduces design cycle? Use, Cadence® Allegro® and OrCAD® release 17.2-2016.  Here are the 10 Top Reasons to Move Up to Allegro 17.2-2016 Release  This enables you to accelerate your PCB design cycle. 

    Get started immediately with the new release using the central page on https://support.cadence.com. It lists important links to Allegro…

    • 26 Jul 2017
  • Breakfast Bytes: One Thing Could Shut Down this Party—Automotive Cybersecurity

    Paul McLellan
    Paul McLellan

     breakfast bytes logoofer ben-noonOfer Ben Noon, CEO and co-founder of Argus Cybersecurity, had the job of raining on the parade at the Automotiv Elektronik Kongress in Ludwigsburg recently. On the day he was speaking, Europe was under attack, Ukraine was largely shut down, big-name shipping...

    • 26 Jul 2017
  • Whiteboard Wednesdays: Whiteboard Wednesdays - What is Post-Package Repair for LPDDR4 Memories?

    References4U
    References4U

    In this week’s Whiteboard Wednesdays video, Marc Greenberg describes the post-package repair capability introduced in the LPDDR4 specification which is expected to increase in importance for future LP/DDR5 memories.

    https://youtu.be/kIpQXWTGnHA

    • 26 Jul 2017
  • Learning and Support: What to Expect from Each Collateral on Cadence Support Portal and How to Access Them

    MJ Cad
    MJ Cad

    Undoubtedly, the most important component of any online portal is CONTENT and its Ease of Accessibility. In the digital world, content is a mix of text, graphic, video, and so on. This blog covers different types of collateral available on Cadence Support...

    • 25 Jul 2017
  • Breakfast Bytes: Meet the Newest Member of the Tensilica Family, the HiFi 3z DSP

    Paul McLellan
    Paul McLellan

     breakfast bytes logoAs NVIDIA's Jensen Huang pointed out a few weeks ago, and I covered in my blog post yesterday NVIDIA's Jensen Huang on Accelerating the Race to Autonomous Cars, processors are not getting any faster. Instruction-level parallelism is all tapped...

    • 25 Jul 2017
  • Breakfast Bytes: What's For Breakfast? Video Preview July 31st to August 4th 2017

    Paul McLellan
    Paul McLellan

    https://youtu.be/9bkl9KLReDI

     breakfast bytes logo

    Coming from hyperspace (camera Sean, editing me)

    Monday: Moving Logic into the 3rd Dimension

    Tuesday: An Academic View on How Tesla Will Not Win

    Wednesday: Samsung SDI on Batteries

    Thursday: O Lord Won't You Buy Me a Mercedes...

    • 24 Jul 2017
  • Verification: Xperiences with Xcelium: Hewett-Packard Enterprise Makes the Switch

    XTeam
    XTeam

    At Hewlett-Packard Enterprise (HPE), the team working to create IP for “The Machine,” HPE’s vision for the future of computing, recently decided to make the switch to the Xcelium Simulator from their old mix of simulators. To gauge how much Xcelium would help improve their productivity, engineers at HPE devised a series of trials. Each trial applied a specific set of circumstances to check how Xcelium would perform in…

    • 24 Jul 2017
  • System, PCB, & Package Design : Are You Maximizing Your Product Design? See How a Custom ASIC Can Help

    Darintb
    Darintb

    When you push more of your board into high-performance design fabric like an SoC, suddenly you have the scope for differentiation and innovation in an SoC that you design yourself. Custom SoCs increase differentiation, reliability, IP protection, security of supply, and performance. They also decrease board size, power, BOM, and cost. Are you ready to take the leap?

    Many companies are working with custom ASICs these…

    • 24 Jul 2017
  • Breakfast Bytes: NVIDIA's Jensen Huang on Accelerating the Race to Autonomous Cars

    Paul McLellan
    Paul McLellan

     breakfast bytes logojensen huang nvidiaJensen (Jen-Hsun) Huang is CEO of NVIDIA. If you know anything about NVIDIA, it is probably that they have a strong position in the graphic processor unit (GPU) market, especially for video games. However, their industry has been changing. A GPU is a...

    • 24 Jul 2017
  • Breakfast Bytes: Short Papers

    Paul McLellan
    Paul McLellan
    Yesterday my post was Cadence Academic Network Asia and it was just what it says on the can. Of course success in academia is all about publications—publish or perish. But nobody likes to do more work than necessary, so how short can your ...
    • 21 Jul 2017
  • Breakfast Bytes: Cadence Academic Network Asia

    Paul McLellan
    Paul McLellan

     breakfast bytes logotracy zhu cadence academic program asiaI sat down with Tracy Zhu to find out about the academic network in Asia Pacific. I'm based in San Jose, and she is based in Shanghai, so the obvious place to meet is...a biergarten in Munich!

    She joined a year ago from running an academic program...

    • 20 Jul 2017
  • Breakfast Bytes: What's For Breakfast? Video Preview July 24th to 28th 2017

    Paul McLellan
    Paul McLellan

    https://youtu.be/Dgy8LrCe13s

     breakfast bytes logo

    Coming from the Intel Museum (camera Sean)

    Monday: NVIDIA's Jensen Huang on Accelerating the Race to Autonomous Cars

    Tuesday: Embargoed Product Announcement

    Wednesday: Automotive: One Thing Could Shut Down this Party...

    • 19 Jul 2017
  • Breakfast Bytes: Bosch: Future of Connected Mobility

    Paul McLellan
    Paul McLellan

     breakfast bytes logobosch volkmar dennerAt the conference in Ludwigsburg that I attended, Volkmar Denner, head of management at Bosch, talked about the future of connected mobility. Bosch is the largest tier-1 automotive supplier in Europe. However, they are not limited to automotive and also...

    • 19 Jul 2017
  • Whiteboard Wednesdays: Whiteboard Wednesdays - Understanding the In-line ECC Architecture Required by LPDDR4 Automotive Memories

    References4U
    References4U

    In this week’s Whiteboard Wednesdays video, Marc Greenberg explains the difference between error correcting code (ECC) implementation using a traditional sideband architecture vs. the new in-line ECC used in LPDDR4 which delivers improved error correction for sensitive applications like automotive electronics.

    www.youtube.com/watch

    • 18 Jul 2017
  • Verification: Enum compatibility error in Specman

    teamspecman
    teamspecman

     

    One of my favorite quotes about SW programming is the following by Edsger Dijkstra: "If debugging is the process of removing software bugs, then programming must be the process of putting them in." Yes, we all insert bugs while we write code. And a significant part of the verification development time is spent on debugging. You might be tempted to think that most debugging time is spent on detecting errors like memory…

    • 18 Jul 2017
  • Breakfast Bytes: The Four Ts: Trade, Tax, Talent and Technology Funding

    Paul McLellan
    Paul McLellan

     breakfast bytes logoIf you work in the semiconductor industry, and you probably do if you are reading this, then you know how fascinating it is. There has never been a technology like it, that is both unbelievably complex and moves at such an incredible pace. But it is not...

    • 18 Jul 2017
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