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Memcon is an event like few others, where SoC architects congregate to learn and debate the strategies of system design to keep up with the insatiable data/throughput demands of today’s electronics. The topics range from memory technology to system architectures, as captured in the MemCon 2015 Proceedings. While this year’s agenda will provide similar, updated information, there are 3 things you probably don’t know…

Twice a year TSMC has a big meeting in San Jose. These are the times that there is a public update on their process roadmap, how process ramps are going, the OIP ecosystem, and so on. But they make it hard for people like me since their rules are that...

Adventures in Backdrilling

For the past 15 years or so, routing high-speed interfaces handling 5Gbps or higher have become more common in many electrical designs.   Transitioning high-frequency signals between layers can greatly affect signal integrity when a portion of plated through-hole (PTH) is left unused, forming an electrical stub.  In general, these stubs are a source of impedance discontinuities and signal reflections…

System-on-chip (SoC) designers are always optimizing what has become known as PPA, which stands for power, performance, and area. Almost always, the most severe constraint is on power. We can put a lot of functionality on a chip and we can clock it very...

At CDNLive Israel, Yaron Netanel of Mellanox talked about his experience with Palladium ICA mode. ICA stands for in-circuit acceleration.

One basic way of using Palladium is in-circuit emulation or ICE. In this method, the DUT is modeled on the Palladium...

https://youtu.be/1le_bd4o01Q

Monday: System Design Enablement with Cadence and TSMC. Archtiectural power analysis

Tuesday: The keynotes from TSMC OIP Symposium last week

Wednesday: A preview of next month's MemCon

Thursday: The keynotes from...

A couple of sessions at MIPI DevCon last week were on I3C. This is a new generation based on the old I²C standard. Confusingly, the old standard is pronounced "eye-squared-see" but the new one is "eye-three-see".

The ...

As a SKILL code developer, do you spend a major chunk of your time in fine-tuning your SKILL code? I am sure nobody writes perfect code in the first attempt. Producing efficient and bug-free code involves several iterations of proactively monitoring the code, eliminating bottlenecks, and analyzing as well as improving its performance. And there are tools that can help you improve your code’s performance without affecting…

Shalom. Today is CDNLive Israel in Tel Aviv. At least getting here from San Francisco has got easier, since United now has direct flights three days a week. But for locals, it is not so easy:

Commuters traveling to Tel Aviv, Israel’s commercial hub,...

In this week's Whiteboard Wednesdays video, Lana Chan explores the history of PCI Express (PCIe) and how it evolved into the de facto interconnect standard it is today.

https://youtu.be/DhCbf-SCPfk

On September 14 and 15, MIPI held its first developer conference. For more background, see my posts Cadence's History with MIPI and MIPI SoundWire.

There were two keynotes on the first day. The first was by Linley Gwennap of the Linley Group. This...

Customer inputs are key to product improvements

I can read your minds as you digest the features and benefits of our Allegro 17.2-2016 Release. “Oh no, what have they done now to disrupt my environment?” If you have been an Allegro user for many years, you know what I’m talking about. Dot Zero releases as we call them are our chance to make database / schema changes that result in some level of migration…

At CDNLive Boston, I moderated a panel session on signal and power integrity with a panel of five true experts on the topics. They work on some of the highest performance systems out there. It was a double-length session, taking up two slots at the end...

Great Academic Networking in Taiwan

With the support of the Cadence Academic Network, Cadence Taiwan joined the 27th VLSI Design/CAD 2016 Symposium in Kaohsiung, Taiwan.  Cadence connected with approximately 800 attendees from local industries, and academic...

Since the year 2000, the European Solid-State Device Research Conference (ESSDERC) and the European Solid-State Circuits Conference (ESSCIRC) have joined their organization committees in order to bring together one of the most exciting  events of the year...

A codec compresses data for transmission. The first codec I had any close encounter with was the full-rate speech coder used in GSM. This compressed voice into 13kb/s. For comparison, wired phones transmitted uncompressed data at 56kb/s (US) or 64kb/s...

https://youtu.be/KKiIDaN-3CE

Monday: At CDNLive Boston I moderated a panel session with east coast experts on Signal and Power Integrity.

Tuesday: I present the highlights of MIPI's first developer conference, as MIPI transitions from being mobile-only...

At CDNLive in Boston, Andrew Ross of AMD presented a wealth of practical information about how best to use emulation.

He broke things down into four main areas: hardware systems, workflow, stimulus, and design. He pointed out that there are really two...

In EDA you traditionally have to know several modelling languages for several domains. One of those domains is functional verification. In functional verification you will be working with Hardware Design Languages (HDLs), Hardware Verification Languages...

IEEE 802.3 is the standard number for various flavors of Ethernet. With Ethernet constantly increasing its speed for use in data centers, Ethernet moving into vehicles, power over Ethernet, and Ethernet over various media, there is a lot of work going...

In this week's Whiteboard Wednesdays video, Michelle Mao follows up on last week's video and takes a closer look at Hierarchical CNN and how to train different networks for family and member classification.

https://youtu.be/WzPcECV5Uqs

At CDNLive Boston, the invited keynote was by Dr. Bill Chappell of DARPA's Microsystems Technology Office. Since he took the position in mid-2014, he has focused the office on three key thrusts important to national security. These thrusts include ensuring...

Way back in 2006, Luciano Lavagno, Lou Scheffer, and Grant Martin, all then at Cadence, edited a two-volume book on EDA. The first volume covered EDA for IC System Design, Verification and Testing. The second volume covered EDA for IC Implementation,...