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In this week's Whiteboard Wednesdays video, Lou Ternullo reviews the latest DRAM innovations and how they help improve density at the system level.

Nothing beats knowing, a late electronics-industry veteran used to say. That’s no more crucial than in debug, where Cadence has recently rolled out the new Indago Debug Platform to attack the biggest bottleneck in the IC functional verification flow.

Richard Goering, who blogged about the announcement, wrote: “Part of the Cadence System Development Suite, the Indago Debug Platform can reduce the time to identify…

In this week's Whiteboard Wednesdays video, Susan Peterson breaks down why you should buy memory models from Cadence versus getting them from manufacturers.

https://youtu.be/rlttauMzFEI

Hear what Bruce Imai—a Cadence Educational Services course developer—Cadence Application Engineers, and customers have to say about the valuable content available in our Allegro Design Entry HDL Front to Back Flow Cadence Training course. As Bruce emphasizes, “You’ll learn in a short amount of time techniques that might take you months to discover yourself.”

Here’s the video:
https…

USB is regarded as the world’s most popular serial interface, with over 1 billion devices shipping every year. This means there are a lot of players in the market, and many possible applications. From mice to mobile application processors, through set-top boxes and video cameras, it’s actually hard to imagine a device that is not USB-connected. How then should a designer make a decision today, that will not make his product…

In this week's Whiteboard Wednesdays video, Bob Salem takes a closer look at analog front-end interfaces and why they are important for the wireless communications market.

https://youtu.be/UJMXrTCu4IY

In this week’s Whiteboard Wednesdays, Chris Rowen highlights the requirements of the wide variety of sensors – environmental, motion, audio, and imaging. He'll cover data rates, sample rates, and levels of computation associated with sensors. He'll also discuss why, since computational requirements vary so much, a new DSP is needed. The Tensilica Fusion DSP uses a very flexible architecture that can be tailored for the…

The suppression of unassigned indirect vias is now supported in Allegro PCB Editor 16.6, which assigns the property ‘EMB_INDIRECT_VIA_SUPPRESS’ to the Component Definition, Component Instance, or Symbol Pin. If a component is placed on an ‘Indirect Attached’ embedded layer, this new property suppresses ALL via pads associated with the component if the PIN is not on a named net.  The indirect attach…

In this week's Whiteboard Wednesdays video, Lou Ternullo discusses DDR subsystems and their effect on latency.

https://youtu.be/7CiPHHhlj-U

One of the best, most insightful (no pun intended) conferences each year is the Embedded Vision Summit, May 12, 2015, at the Santa Clara Convention Center, not far from Cadence’s HQ offices. If you want to incorporate visual intelligence into your products, you need to go to this conference. Hot topics include convolutional neural networks, image recognition, image search, 3D vision, specialized vision processors, standards…

Consumer demand for entertainment and communication is changing the architecture of your electronic devices. And Cadence is providing key IPs necessary for SoC developers to quickly bring their products to market. Today Cadence is unveiling its first-silicon results for both DDR4 and LPDDR4 IP on TSMC's 16nm FinFET Plus (16FF+) process, with test chips operating at 3200Mbps. This speed can support the computation requirements…

With more than 100 presentations, live product demos, designer expo, and numerous engaging technology discussions, CDNLive Silicon Valley 2015 was a networking opportunity worth joining. And since conference proceedings from all 10 technical tracks are now available online, we wanted to share with you once more all the inspiring design, verification and processor IP presentations in this year’s IP track.

Best…

Many of today’s SoCs are built around multi-layered, sophisticated interconnect IP components that link together multiple processor cores, caches, memories, and dozens of other IP blocks. These interconnects are enabling new generations of low-power servers and high-performance mobile devices. However, sophisticated interconnects have to be highly configurable, which creates unique challenges for SoC integrators and verification…

In this week's Whiteboard Wednesdays video, Susan Peterson takes a closer look at protocol standards and what to look for when adopting these technologies.

https://youtu.be/imzeUlFBsqc

With the 16.6 Allegro PCB Editor release, custom text can now be specified for any dimension value using the optional Text field located in the Options Panel. If the entered text is specified in the Text field, it will override any computed or specified entries in the Value field. You can also use the following format strings in the Text field:

• %v when entered in the text field will be substituted by the computed dimension…

If you’ve never heard of the Linley Mobile Conference, you’ve been missing out on one of the most influential conferences for design innovation for next-generation mobile devices.

Registration is now open for the Linley Mobile Conference, April 22-23, at the Hyatt Regency Hotel in Santa Clara, CA. And you’re going to want to attend.

Just read the show’s description:

Innovation in mobile chip…

1. Cadence Online Support has a sleek new design along with support for iPAD and Android tablet (7" and above).   Find out what's new. (Note: Some users are experiencing display issues in Chrome version 41 and 42. Cadence is working to find a resolution. If you experience this, we suggest you use IE or Firefox until a fix for Chrome is identified.)

2. Design Rule Driven (DRD) Editing and DRD…

When designing next-generation products, the common theme is "faster, smaller, cheaper".  When that is combined with longer battery life and lower power consumption requirements, the design challenges can be daunting.  And one thing you know for sure, the project schedule is not going to be extended to allow you to overcome all these challenges.

It certainly makes sense that every electronic product designer…

Switched Mode Power Supplies (SMPS) are used extensively in most of the power conversion processes due to their efficiency and compactness. The analysis, design, and the modeling processes have all grown in the past four decades. Most of these developments were centered on hard-switching converters where the switching frequency was limited to a few KHz. The present direction of evolution in SMPS is towards high efficiency…

In this week's Whiteboard Wednesdays video, YJ Patil discusses the challenges of LPDDR4 IP verification when designing high-speed, low-power memory for mobile SoCs.

https://youtu.be/bPobqXqZq9M

What’s the biggest conference for everything related to memories? If you answered MemCon, you’d be right.

MemCon 2015 is on Tuesday, October 13, 2015, at the Santa Clara Convention Center. The call for papers just opened, so it’s time to think about how you can further your career and showcase your understanding of key memory technologies.

See the full list of suggested topics, but here are some of…

BARCELONA, Spain—We hear a lot about sensor fusion and the applications that it can enable. But conquering the technical hurdles while keeping your project on budget is non-trivial.

“What you’re going to see is that with a solid sensor fusion output, people are going to be building newer and better applications, like incorporating pedestrian dead reckoning with satellite GNSS information to get better tracking…

In this week's Whiteboard Wednesdays video, Bob Salem explains WiGig (IEEE 802.11ad), the next-generation wireless communication interface. Bob details how applications including entertainment, small office, small corporate groups, and hotspots all benefit from this powerful, wireless interface.

https://youtu.be/eT1sT4Y_FjQ