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Cadence has been a leader in silicon-package and package-board co-design for over a decade now. Today, Cadence introduced a new and innovative solution for FPGA-PCB Co-design.

The FPGA-PCB co-design solution includes proven technology from Taray Inc for optimized, correct-by-construction FPGA I/O pin assignment synthesis that takes into account the placement and routing of the FPGAs.

What is unique about…

For those of you who can't make it to the CDNLive Munich Designer Expo this week, and/or as promised in the recent interview with AMIQ about their new "DVT" Integrated Development Environment, here is a 5 minute demo introducting DVT's e language-specific features.  Enjoy!

If video fails to launch click here.

You can also learn more about DVT by exploring www.dvteclipse.com where you'll…

A while back, I posted a blog called Getting Started with dbGet. It was a brief introduction to this database access mechanism. Well, dbGet is only half the story - there is also a command called dbSet, which can give you even more power in your scripting or manipulating of the design database.

It works in much the same way as dbGet. As a quick review, let's say we wanted to find out the placement status of the instances…

Given the small nature of the EDA industry, I have read with some interest company announcements regarding "Primary" or "Key" EDA partnership status. In reading the content, it became clear to me that the wording was meant to obfuscate some important facts, particularly in the area of analog design which I work in. One might read those press releases and *think* that the quoted customer used only one EDA vendor's software…

As our loyal readers know, we on Team Specman works hard to include code examples inside of our posts whenever possible.  However, sometimes the amount of code we want to share with you can exceed the scope of a browser window and/or RSS reader pane. Consequently, we are going to start to leverage some popular verification sites when the need arises to share longer blocks of e code or related utilities in Perl, C, etc…

The AMS Simulator Smoke Analysis has been enhanced in the SPB16.2 release to support a few new devices. Also, the  Model Editor now supports the addition of smoke parameters to devices like LEDs, Zener Diodes, Varistors, etc.

The following new devices are now supported by Smoke Analysis:

• Electrolytic Capacitor
• Inductor for DC Current
• VSWITCH
• Transformer (Single and Double Winding)

In addition, smoke parameters can be added to…

A while ago, I somehow ended up on the mailing list of a rather odd catalog called "Things You Never Knew Existed..."  I think I got on the list when I bought some stocking stuffers for my kids for Christmas-things like little plastic pencil sharpeners shaped like noses (yes, you have the right mental picture-quite the hit with the 12-year-old set).  So now you where to go to get a remote-controlled skunk or a…

Attention Specmaniacs: the IEEE 1647 working group is looking for a few additional volunteers to help develop the next version of the e language standard. In case you haven't seen the article from new Working Group chair Darren Galpin on the "Industry Insights" blog, or the call for participation letter published on JL Gray's "Cool Verification" blog, allow Team Specman to also share the following…

Good news for Specmaniacs based in the EU: next week from May 18-20 is the annual CDNLive! event in Munich.  An overview of the conference with info on how to register is here: http://www.cadence.com/cdnlive/eu/2009/pages/default.aspx

Naturally CDNLive Munich will cover all aspects of Cadence's technologies and methodologies, and verification gurus like fellow bloggers Mike Stellfox and Tom Anderson will be attendance…

Specmaniacs everywhere should be aware of a great, full-featured integrated development environment (IDE) available for e language coding from long time Verification Alliance partner AMIQ.  In today's post, Team Specman invites the founder of AMIQ, Cristian Amitroaie, to tell us about this tool, and how it's different from the many other editor choices out there. 
(FYI: AMIQ will also be showing DVT at the CDNLive…

In the lab, no one can hear you scream!

When I was getting my BSEE in the 1980s and studying analog and communications, my friends would say, “Why are you studying that old dinosaur, digital is where it’s at!”.  Well, far from being consigned to the La Brea tar pit, analog is once again on the upswing as companies seek ways to differentiate themselves in the marketplace. Over the last several…

The EDA Industry is the unsung hero behind for modern era electronic revolution since early 80s and gets the spotlight it deserves in the recent DAC newsletter.

I would like to applaud the author Geoffrey James, for crediting the EDA industry in rising to the challenges associated with each and every technology process node, in particular advancing the use of multi-core architectures. The EDA industry continues…

Over the last three years, customers have been able to leverage the Cadence Low-Power Solution to tapeout their most complex designs. SiRF is no exception. However, in the case of SiRF, another secret weapon was used that made things even easier and cut design time significantly – SiRF leveraged the expertise of the Cadence VCAD Services team. “I believe we could not have met our aggressive schedule or power targets…

The emergence of sub-micron technologies has enabled today’s designers to include various digital/analog/RF components in a single chip. The complexity of validating such designs has highlighted the necessity for a robust validation methodology and for an appropriate process for running efficient simulations. At CDNLive! 2008, we introduced will an innovative, efficient and accurate verification flow using Cadence…