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System, PCB, & Package Design : What's Good About New Smoke Analysis Devices? Check out the SPB16.2 Release and See!

Jerry GenPart
The AMS Simulator Smoke Analysis has been enhanced in the SPB16.2 release to support a few new devices. Also, the Model Editor now supports the addition of smoke parameters to devices like LEDs, Zener Diodes, Varistors, etc.

The following new devices are now supported by Smoke Analysis:
Electrolytic Capacitor
Inductor for DC Current
VSWITCH
Transformer (Single and Double Winding)

In addition, smoke parameters can be added to…
- 13 May 2009
Verification: ISX Presentations at CDNLive! Munich

jasona

As we head into next weeks CDNLive! event in Munich it's great to see today's post in the Industry Insights area by Richard Goering on the Embedded Software Challenge. It provides concrete data on the rising costs of embedded software design ...
- 13 May 2009
SoC and IP: Taiwan: From Death by DRAMs to Finding Foundry Success

Denali Blog

Vanguard International Semiconductor, Once a DRAM failure, is Now a Successful Junior TSMC
The conundrum that Taiwan DRAM makers find themselves in today has been a topic of this column for many months, along with other commentary that has appeared on the internet, in print media and on the airwaves for far longer. In short, the Faustian agreement struck by Taiwan's chipmakers with the Devil, for DRAM technology and…
- 12 May 2009
SoC and IP: Taiwan DRAM Makers...Trapped by Their Culture?

Denali Blog

Can Taiwanese DRAM Makers Decide What to do Next...in Time?
We recently saw yet another article, this one in EETimes Asia, suggesting that Taiwan DRAM makers stop bickering with one another, and go ahead and consolidate their operations into a larger, more powerful DRAM force:

What should Taiwan DRAM makers do to survive? Posted:05 May 2009

Not too far down in the article was this observation, which prompts…
- 12 May 2009
Analog/Custom Design: Things You Didn't Know About Virtuoso: Introduction

stacyw

A while ago, I somehow ended up on the mailing list of a rather odd catalog called "Things You Never Knew Existed..." I think I got on the list when I bought some stocking stuffers for my kids for Christmas-things like little plastic pencil sharpeners shaped like noses (yes, you have the right mental picture-quite the hit with the 12-year-old set). So now you where to go to get a remote-controlled skunk or a…
- 12 May 2009
Verification: IEEE P1647-2010 Call For Participation

teamspecman

Attention Specmaniacs: the IEEE 1647 working group is looking for a few additional volunteers to help develop the next version of the e language standard. In case you haven't seen the article from new Working Group chair Darren Galpin on the "Industry Insights" blog, or the call for participation letter published on JL Gray's "Cool Verification" blog, allow Team Specman to also share the following…
- 12 May 2009
Verification: CDNLive Munich Guide for Specmaniacs

teamspecman

Good news for Specmaniacs based in the EU: next week from May 18-20 is the annual CDNLive! event in Munich. An overview of the conference with info on how to register is here: http://www.cadence.com/cdnlive/eu/2009/pages/default.aspx
Naturally CDNLive Munich will cover all aspects of Cadence's technologies and methodologies, and verification gurus like fellow bloggers Mike Stellfox and Tom Anderson will be attendance…
- 11 May 2009
SoC and IP: Cross Currents in Memory Market Signal Changes Ahead

Denali Blog

No one can say with any certainty, but...
Recent improvements in DRAM and NAND pricing, a firming of demand, and a 'the bloom is off the rose' attitude toward the 'TMC DRAM Salvation Initiative', have all pointed to perhaps a better memory future, after a 2008 loss of $20B and another $7-8B in 1Q09 by memory makers. This will not, however, happen "...in the first hundred days...", so out of kilter the sector is today…
- 7 May 2009
Verification: Modeling Interfaces with C-to-Silicon Compiler

TeamESL

Users of ESL tools are curious about the procedure for handling the interface to a bus or other communicaton protocol in a High Level Synthesis environment. This is usually formulated in the following question: “How do we take int...
- 7 May 2009
Verification: Tracing TLM 2.0 Activity in an ESL Design – Part 3

georgef

Last time I discussed how to use –sctlmrecord to produce an SST2 database of TLM 2.0 transaction data (http://www.systemc.org). In this post, we’ll explore the data in the Simvision Waveform Viewer, the Transaction Explorer, and with TxE....
- 7 May 2009
Verification: e Coding Made Easy with the “DVT” Integrated Development Environment

teamspecman

Specmaniacs everywhere should be aware of a great, full-featured integrated development environment (IDE) available for e language coding from long time Verification Alliance partner AMIQ. In today's post, Team Specman invites the founder of AMIQ, Cristian Amitroaie, to tell us about this tool, and how it's different from the many other editor choices out there.
(FYI: AMIQ will also be showing DVT at the CDNLive…
- 6 May 2009
Verification: It's Not Too Early to Think About DAC 2009

jasona

Even though it's still a couple of months off, it's not too early to think about DAC 2009. This year's conference will be held July 26-31 at the Moscone Center in San Francisco. The technical program was announced this week, and after a c...
- 6 May 2009
Verification: OSCI Launches Video Tutorials for TLM 2.0

Steve Brown

Cadence is one of the sponsors of a series of Open SystemC Initiative (OSCI) TLM 2.0 tutorials, first delivered at DVCon 2009. They have been captured in video form for your access, anytime, anywhere! The Tutorials Agenda:Introduction and Welc...
- 5 May 2009
Analog/Custom Design: Jurassic Park IV: The Return of ANALOG

NewYorkSteve

In the lab, no one can hear you scream!

When I was getting my BSEE in the 1980s and studying analog and communications, my friends would say, “Why are you studying that old dinosaur, digital is where it’s at!”. Well, far from being consigned to the La Brea tar pit, analog is once again on the upswing as companies seek ways to differentiate themselves in the marketplace. Over the last several…
- 5 May 2009
Digital Design: EDA Industry Stays Ahead of Technology Curve

Nora

The EDA Industry is the unsung hero behind for modern era electronic revolution since early 80s and gets the spotlight it deserves in the recent DAC newsletter.

I would like to applaud the author Geoffrey James, for crediting the EDA industry in rising to the challenges associated with each and every technology process node, in particular advancing the use of multi-core architectures. The EDA industry continues…
- 5 May 2009
Digital Design: Interview with SiRF's Nigel Foley on Low-Power Design

archive

Over the last three years, customers have been able to leverage the Cadence Low-Power Solution to tapeout their most complex designs. SiRF is no exception. However, in the case of SiRF, another secret weapon was used that made things even easier and cut design time significantly – SiRF leveraged the expertise of the Cadence VCAD Services team. “I believe we could not have met our aggressive schedule or power targets…
- 4 May 2009
Analog/Custom Design: An Efficient and Fast Verification Flow for Analog Designs Validation using Virtuoso SpectreMDL

archive

The emergence of sub-micron technologies has enabled today’s designers to include various digital/analog/RF components in a single chip. The complexity of validating such designs has highlighted the necessity for a robust validation methodology and for an appropriate process for running efficient simulations. At CDNLive! 2008, we introduced will an innovative, efficient and accurate verification flow using Cadence…
- 4 May 2009
Verification: Using Macros for Repetitive Coding Tasks

teamspecman

For this post welcome guest blogger Hilmar van der Kooij. Hilmar is a Cadence Application Engineer for our Metric Driven Verification solutions. He has expertise in applying Metric Driven Verification both in simulation as well as formal analysis. Himar is based in beautiful Stockholm, Sweden. Besides living the Jetset Verification Lifestyle, he enjoys playing around with an old-fashioned film photocamera.
Thanks Hilmar for…
- 4 May 2009
SoC and IP: Early Returns on 1Q09 Financials

Denali Blog

Memory Companies Suffer More in 1Q09, but Future Looks Better...or so they say:
Many of the world’s leading memory companies have already reported their 1Q09 financial results, which are, not surprisingly, about the same as their 4Q08 results, both in the sales levels and profits, though DRAM was marginally worse and NAND flash likewise a little better. Hynix, Samsung, SanDisk, Micron are all in; Elpida and Toshiba…
- 1 May 2009
RF Engineering: Enhanced pnoise Algorithm to Compute Phase-Noise for VCOs with Bandgap Voltage Reference

archive

Accurate phase-noise characterization is critical in the design of RF and microwave communication systems. SpectreRF’s shooting PSS/Pnoise analysis has been the golden simulator for the phase-noise simulation, and close correlation between the simulation...
- 1 May 2009
Verification: Some SystemC Perspectives - An Interview with Vincent Motel

Steve Brown

I sat down with Vincent Motel recently, a long time Cadence employee, and one of several experts on the past, present, and future opportunities of using SystemC. The following interview provides some interesting glimpses into the original motivations...
- 30 Apr 2009
System, PCB, & Package Design : What's Good About Relational Table Support in Capture-CIS? You'll Need SPB16.2 to See!

Jerry GenPart

With SPB16.2 release, Capture-CIS allows you to create and use relational tables in the parts database. These tables have a one-to-many relationship with part information (primary) tables. For example, the database may contain a Vendor table with multiple vendor / manufacture part numbers for one company part number in your Resistor table. This structure allows you to query for data across the primary and relational tables…
- 29 Apr 2009
Analog/Custom Design: Getting a Feel for RF

archive

It was a delight when I read the blog by Bill Schweber of TechOnline's RF DesignLine titled “Getting some basic RF experience”. I was surprising pleased that somebody took the time to talk about how one might get the feel for RF. That is because what Bob talks about is more or less how I gained some of the experience that lead me to pursue this decades later.

I have always been fascinated by radio…
- 29 Apr 2009
SoC and IP: Industry Downturn Perspectives..Forward and Backward

Denali Blog

Recent Results Signal Better Times Ahead; How Much Better?...Little Consensus, But Some Interesting Scenarios are Possible.

After being in something of a free-fall for the better part of six months, the past 30 days' results have offered some hope for the semiconductor and memory industries in terms of improved capacity utilization, price stability (if not price increases), and better demand filling up the order…
- 28 Apr 2009
Verification: Performance-Aware e Coding Guidelines – Part 5

teamspecman

In this last segment of the series on performance-aware coding, allow me to share with you two tips on improving the performance of Temporals.
Temporals Performance Tip 1: Setup a "Synch Unit"
If you don't already use a synch unit - I recommend you setup one up now. Here's why: the synch unit contains ports connected to the device under test, and it defines events based on these ports. Thus, when working…
- 28 Apr 2009

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