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Latest Blog Posts

  • Verification: Send Us Suggestions for Updating the e/Specman Quick Reference Card

    teamspecman
    teamspecman

    Team Specman is about to start a project to refresh the e/Specman Quick Reference card included with every Specman/IES release. (While the basics of the current card are OK, we concede some of its content is getting a little long in the tooth). Hence, please let us know your preferences about what we should edit, add, or subtract from the next version of the card in the comments below, or contact us directly offline.

    For…

    • 19 Jun 2009
  • Verification: Speeding up SystemC compilation with Incisive SystemC

    georgef
    georgef
    If you’re a C++ and SystemC programmer you know that when you’ve spent all day tracking down a nasty bug, nothing can bum your trip more than having to wait around for a long recompile. Compile time is a bottleneck for SystemC developme...
    • 19 Jun 2009
  • Digital Design: Technical Webinars Hosted by the Experts - Don't Miss Them!

    archive
    archive

    Starting June 23, 2009, Cadence technical experts will host a series of technical webinars on myriad of topics. During this free webinar series, you’ll discover possible solutions and best practices to overcome the challenges you may be facing today or ones you’ll soon be facing. Learn new applications and methodologies, ask questions, and follow up with our technical experts after the event to continue the…

    • 18 Jun 2009
  • SoC and IP: Taiwan Agonistes: Why Taiwan Should Demote DRAMs, and Agressively Expand Its Foundry Dominance Instead

    Denali Blog
    Denali Blog
    Taiwan Cannot Shake Attraction for DRAMs, Marches Down Same Path as Many Others Before Them
    Abstract: Taiwan wants to be a big player in DRAMs, which we believe is a losing proposition and a strategic mistake, not only for Taiwan but for all DRAM makers. They should embrace their strengths and domination of the worldwide foundry business, repurpose some of those DRAM fabs to make next generation logic, and expand…
    • 18 Jun 2009
  • Verification: VCS Runs OVM -- 2 Years Late, But Welcome None the Less

    Adam Sherer
    Adam Sherer

    Something seems to have changed in the Synopsys VCS simulator; the Web2.0 world is buzzing this week about the OVM running on VCS. We first saw a post on the LinkedIn "OVM Professionals Network"on Monday June 15.  Today we saw a more detailed posting at IntelligentDV specifically stating a released version of VCS that will run the OVM.

    For nearly two years we have talked to many VCS users who wanted to access…

    • 18 Jun 2009
  • Verification: New Video on "Metric Driven Verification 101", With Yours Truly Giving the Intro

    jvh3
    jvh3

    Recently I had the honor of delivering the introductory section of a detailed demo on "Metric Driven Verification 101" given by my colleague Nick Heaton, an Architect in our Verification Solutions organization.

     

    demos_on_demand_MDV_101_video_June_09


    Specifically, after a few introductory slides by yours truly set the stage, in the video Nick shows in detail the methodology behind metric driven verification ("MDV"), and how it improves…

    • 18 Jun 2009
  • Verification: Tip for Linking AMIQ’s DVT to the Specman Docs

    teamspecman
    teamspecman

    Since posting an introductory article and demo on AMIQ’s “DVT” integrated development environment (IDE), AMIQ has seen a spike in interest in the tool (yeah!)  Given the particular interest being shown by Specmaniacs, AMIQ has forward us the the following tech tip about how you can point to Specman’s HTML docs, AND how you can search through the docs from inside DVT itself.  (Recall that DVT is…

    • 17 Jun 2009
  • System, PCB, & Package Design : What's Good About the new FPGA System Planner? - Ask Hemant Shah!

    Jerry GenPart
    Jerry GenPart

    Our product marketing manager for Allegro PCB products, Hemant Shah introduced the FSP product in his Blog post - Innovative Approach to Optimized FPGA Pin Assignment


    For an interesting interview about the new FPGA System Planner (FSP) product, please read the details here.

    Here are some "take-aways" from Hemant's interview that I found noteworthy:

    • Our customers are leveraging the power, design flexibility…
    • 17 Jun 2009
  • Verification: OVM Metric Driven Verification With an FPGA-based Design

    TeamESL
    TeamESL
    During the last 2 years I have enjoyed the opportunity to work with the Incisive Software Extensions (ISX) with many customers. I learned a lot about software/hardware co-verification and we reached the point were we started to see beyond one&rsquo...
    • 17 Jun 2009
  • Analog/Custom Design: Things You Didn't Know About Virtuoso: Managing Your Real Estate - Part 2

    stacyw
    stacyw

    I keep my toothpaste in my bathroom.  I keep the paprika in the kitchen.  I keep the band-aids in the bathroom near the living room.  Two points here.  First, I keep the tools I need near the place where I do the activity for which I might need them.  Second, I try to always keep things in the same place so I know where they are when I need them.  Sounds sensible, right?  Dinner would never be ready on time if I had to keep…

    • 16 Jun 2009
  • Verification: The DWARF Debugging File Format

    jasona
    jasona
    The Chronicles of Narnia has always been one my favorite series of books. Today, I'm not going to talk about dwarfs such as Trumpkin, the dwarf that appeared in Prince Caspian (check out the latest movie), but instead something called the DWARF D...
    • 12 Jun 2009
  • Verification: Enabling OVM Transaction Debug in SimVision Without Code Changes

    Team genIES
    Team genIES
    Are you tired of putting print statements in your code to do debug?  Do you work with designers who just want to use waveforms to debug testbench and design problems?   

    There is a cool feature in the OVM library and Incisive Enterprise Simulator that comes to the rescue.  It is the built-in OVM transaction recording.

    Modern metric driven testbenches generate a lot of dynamic data on the fly during a simulation…

    • 11 Jun 2009
  • Verification: Team genIES Bloggers Create Simulation Magic

    Team genIES
    Team genIES

    Simulation is a huge topic.  Performance, debug, mixed-signal, low-power, assertions, coverage, IEEE languages, lint checking, interfaces, and much more.  Many of us started using simulation when it was gates and waveforms while others joined in the era of complex, multi-language, testbench-driven simulation. Regardless, the pace of design and verification is accellerating for all of us.  So how can we get those pearls of…

    • 11 Jun 2009
  • Verification: Tips on Using “vhdlsync” With e+Mixed HDL Simulation

    teamspecman
    teamspecman

    [Team Specman welcomes Principal Support Application Engineer Avi Farjoun to share some important tips on the famous “vhdlsync” switch]

    As users with mixed VHDL and Verilog environments know, even in this day & age mixed HDL simulation cycle semantics are not very well defined.  Even worse: there is no standard that specifies the order of execution of always blocks and VHDL processes, which can lead to simulation…

    • 11 Jun 2009
  • Verification: Thoughts on the DVClub Talk: "Is it Time to Declare Verification War?"

    jvh3
    jvh3

    As noted in a prior post, I had the pleasure of attending a DVClub talk given by Brian Bailey entitled "Is it time to declare verification war?". As suggested by the word "war" title, Brian drew many analogies between the legendary text The Art of War by the Chinese general Sun Tzu, and the strategic and tactical challenges of verifying a complex device under test (DUT), complemented by introductions…

    • 10 Jun 2009
  • Analog/Custom Design: Things You Didn't Know About Virtuoso: Managing Your Real Estate - Part 1

    stacyw
    stacyw

    Yeah, right...in this economy, don't talk to me about real estate.  But I'm not talking about home prices, I'm talking about that territory on the screen right in front of you where you spend your day drawing and clicking and arranging and rearranging in order to accomplish your job.  Cadence has given you lots of tools to help you develop your little plot of land.  Just recently in this blog, I've told you about…

    • 9 Jun 2009
  • Verification: Heads-up: Mixed Signal Verification Webinar (June 10)

    teamspecman
    teamspecman

    For those Specmaniacs using the REAL number data type & ports capabilities in Specman, you might be interested in a webinar our analog colleagues are hosting tomorrow (June 10) from 07:00- 8:15 AM (PDT) and a second broadcast at 10:00 -11:15 AM (PDT).  Specifically, the webinar is titled "How to Boost Performance for Mixed Signal SoC Top-level Verification", and it will address how to handle mixed signal design…

    • 8 Jun 2009
  • RF Engineering: Join us at the Cadence booth at the International Microwave Symposium

    Hany
    Hany

    If you listened to Tom's advice on this blog two months ago and registered for the International Microwave Symposium or the RFIC symposium, then you should be at the Boston Convention center now enjoying RFIC talks. Please remember that we are waiting...

    • 8 Jun 2009
  • Verification: New IntelliGen Statistics Collection Utilility

    teamspecman
    teamspecman

    As noted in white papers, prior posts, and the Specman documentation, since IntelliGen is a totally new stimulus generator than the original "PGEN", there is usually some amount of effort needed to migrate an existing verification environment to fully leverage the power of IntelliGen.  To help expedite this process, I've just posted in the Community's Shared Code area a simple utility that allows you to…

    • 5 Jun 2009
  • Verification: Synthesis Really DOES Need to Change

    archive
    archive
    A great article appeared in Chip Design a few weeks ago written by Tets Maniwa, “Synthesis Needs to Change to Serve Modern Chip Design”. Tets Maniwa is sharp guy. (Those of you designing ICs in the mid/late 1990s probably r...
    • 2 Jun 2009
  • Analog/Custom Design: Things You Didn't Know About Virtuoso: Editing Properties

    stacyw
    stacyw

    When I was growing up, my mother would usually bake a ham for Christmas dinner.  She would always cut a slice off the side before putting it in the pan to cook.  One day I asked her why she did this and she replied that her mother always did it that way.  Now, I've never been the type of person who easily goes along with the "because we've always done it that way" kind of answer, so I asked my grandmother the same question…

    • 1 Jun 2009
  • Digital Design: MarCom 2009 - New, Exciting, Educational

    archive
    archive

    As a Marketing Communications professional, I am always looking for creative ways to communicate with our current and potential customers. Over the last 13 years that I have been in this profession, I have seen many methods and vehicles used by Cadence and various other companies to reach out to external and internal audiences. I must say that some of the things I have seen have been pretty creative and unique. Last year…

    • 29 May 2009
  • SoC and IP: The Great Escape, Part II: How These Companies Exited the DRAM Business

    Denali Blog
    Denali Blog
    Case Histories of Significant DRAM Market Withdrawals:

    This article continues our earlier discussion about the same topic from last week, entitled "...Part I."

    It includes highlights of the most significant departures from the DRAM business over the past two decades, and describes, in broad terms, the experience of these DRAM makers in the market, historically and the events that led to their departures. In some…
    • 28 May 2009
  • Verification: Inside Cadence: "Stars & Strikes" charity event

    jvh3
    jvh3

    Allow me to make a brief digression from EDA technology blogging to give you all a peak at what goes on inside of Cadence.  Specifically, last Thursday May 21 here at the Cadence San Jose campus we had a welcome break in our daily routines for a good cause -- the annual "Stars & Strikes" charity festival.  Let me explain: each year, Cadence offices around the world adopt a single, local charity to be the focus…

    • 28 May 2009
  • Verification: Where's the Bridge to Cross the Great Divide?

    jasona
    jasona
    At this year's Embedded System Conference in San Jose there was a panel with the title Who's Taking over Whom - Is EDA Moving into Embedded or Embedded into EDA?One of the analogies Mike McNamara from Cadence used was hardware and software en...
    • 28 May 2009
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