• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List
  • Discussion

    How can I change the parameter of a pcell instance? Locked

    11427 views
    1 reply
    Latest over 4 years ago
    by Andrew Beckett
  • Discussion

    dynamic stop time in transient analysis Locked

    16104 views
    5 replies
    Latest over 4 years ago
    by Marc Heise
  • Discussion

    No such feature exists. error from lmutil lmdiag command Locked

    13507 views
    2 replies
    Latest over 4 years ago
    by Frank Wiedmann
  • Discussion

    How to see "Edit Via List" in Constraint Manager by command or running specific SKILL function

    3855 views
    2 replies
    Latest over 4 years ago
    by ichliebedich
  • Discussion

    How to check maximum copy usage of license in history? Locked

    12090 views
    1 reply
    Latest over 4 years ago
    by RFinley
  • Discussion

    Can not select/move multiple elements Locked

    832 views
    0 replies
    Started over 4 years ago
    by Brane Pecnik
  • Discussion

    DSPF cellview in Hierarchy Editor will be always netlisted with "subcircuit" model name Locked

    5609 views
    7 replies
    Latest over 4 years ago
    by ZoltanT
  • Discussion

    *E,CUBSPA Assignment of string to real or integer type parameter Locked

    2834 views
    3 replies
    Latest over 4 years ago
    by Andrew Beckett
  • Discussion

    change the Pcell parameter Locked

    12592 views
    1 reply
    Latest over 4 years ago
    by Andrew Beckett
  • Discussion

    Stretching multiple layout wires at once Locked

    14617 views
    4 replies
    Latest over 4 years ago
    by Andrew Beckett
  • Discussion

    Defining supply voltage (and basic connect rules) for digital block for runams Locked

    13319 views
    2 replies
    Latest over 4 years ago
    by jehh
  • Discussion

    Stop an area of a schematic being netlisted. Locked

    12337 views
    4 replies
    Latest over 4 years ago
    by FAwqati
  • Discussion

    Changing multiple pin text names

    17314 views
    6 replies
    Latest over 4 years ago
    by steve
  • Discussion

    Direction of VDD/VSS (inout vs input) Locked

    6023 views
    1 reply
    Latest over 4 years ago
    by Dimo M
  • Discussion

    Innovus hold-time optimization in the presence of synchronizers Locked

    14162 views
    2 replies
    Latest over 4 years ago
    by DusanR
<>

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information