Custom IC Design

Latest Posts

Discussion

Transient simulation output files

Category: Custom IC Design

By Gurunath Kadam

$usertype
•
updated over 10 years ago by Gurunath Kadam

2 replies • 16111 views
Discussion

types of .cdl netlist

Category: Custom IC Design

By Arafat01

$usertype
•
updated over 10 years ago by Andrew Beckett

3 replies • 17422 views
Discussion

Problems encountered in the simulation of ultra-low-power energy harvester

Category: Custom IC Design

By MenghanSun

$usertype
•
updated over 10 years ago by Quek

1 replies • 14045 views
Discussion

Hierarchical wire extraction using QRC Quantus

Category: Custom IC Design

By jsaenznoval

$usertype
•
updated over 10 years ago by Quek

1 replies • 15050 views
Discussion

Problem with auto via using custom via variant

Category: Custom IC Design

By blankman

$usertype
•
updated over 10 years ago by ColinSutlieff

5 replies • 18310 views
Discussion

SpiceIn "subtype" User Property

Category: Custom IC Design

By garobe

$usertype
•
updated over 10 years ago by Quek

1 replies • 1668 views
Discussion

gm-c filter tuning operating over subthreshold

Category: Custom IC Design

By mkza1002

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 14328 views
Discussion

Measuring node to node capacitance (for Neutralization)

Category: Custom IC Design

By itos

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 14427 views
Discussion

Post layout simulation subcells power budget

Category: Custom IC Design

By PassGio

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 14326 views
Discussion

DC Operating Point Parameters

Category: Custom IC Design

By akshay91

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 14676 views
Discussion

AMS library for Cadence layout

Category: Custom IC Design

By ezhanga

$usertype
•
updated over 10 years ago by ColinSutlieff

1 replies • 14633 views
Discussion

Sublibraries in Cadence VIrtuoso

Category: Custom IC Design

By jsaenznoval

$usertype
•
updated over 10 years ago by theopaone

2 replies • 16090 views
Discussion

Problem when invoking the "Display Resource Editor" for Layout Editor

Category: Custom IC Design

By ALfrg

$usertype
•
updated over 10 years ago by Quek

5 replies • 4884 views
Discussion

Best Practices for Compact Modeling in Verilog-A

Category: Custom IC Design

By Frank Wiedmann

$usertype
•
started over 10 years ago

0 replies • 14459 views
Discussion

ADE L simulation problems with stimulus file

Category: Custom IC Design

By orgconfuzion

$usertype
•
updated over 10 years ago by Andrew Beckett

1 replies • 14895 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.