Custom IC Design

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Discussion

interpolation for xmin calculation

Category: Custom IC Design

By RobinCommander

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updated over 10 years ago by RobinCommander

3 replies • 14653 views
Discussion

Transient simulation output files

Category: Custom IC Design

By Gurunath Kadam

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updated over 10 years ago by Gurunath Kadam

2 replies • 14956 views
Discussion

types of .cdl netlist

Category: Custom IC Design

By Arafat01

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updated over 10 years ago by Andrew Beckett

3 replies • 16266 views
Discussion

Problems encountered in the simulation of ultra-low-power energy harvester

Category: Custom IC Design

By MenghanSun

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updated over 10 years ago by Quek

1 replies • 13006 views
Discussion

Hierarchical wire extraction using QRC Quantus

Category: Custom IC Design

By jsaenznoval

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updated over 10 years ago by Quek

1 replies • 14007 views
Discussion

Problem with auto via using custom via variant

Category: Custom IC Design

By blankman

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updated over 10 years ago by ColinSutlieff

5 replies • 17002 views
Discussion

SpiceIn "subtype" User Property

Category: Custom IC Design

By garobe

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updated over 10 years ago by Quek

1 replies • 1447 views
Discussion

gm-c filter tuning operating over subthreshold

Category: Custom IC Design

By mkza1002

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updated over 10 years ago by Andrew Beckett

1 replies • 13327 views
Discussion

Measuring node to node capacitance (for Neutralization)

Category: Custom IC Design

By itos

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updated over 10 years ago by Andrew Beckett

1 replies • 13419 views
Discussion

Post layout simulation subcells power budget

Category: Custom IC Design

By PassGio

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updated over 10 years ago by Andrew Beckett

1 replies • 13326 views
Discussion

DC Operating Point Parameters

Category: Custom IC Design

By akshay91

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updated over 10 years ago by Andrew Beckett

1 replies • 13638 views
Discussion

AMS library for Cadence layout

Category: Custom IC Design

By ezhanga

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updated over 10 years ago by ColinSutlieff

1 replies • 13592 views
Discussion

Sublibraries in Cadence VIrtuoso

Category: Custom IC Design

By jsaenznoval

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updated over 10 years ago by theopaone

2 replies • 14881 views
Discussion

Problem when invoking the "Display Resource Editor" for Layout Editor

Category: Custom IC Design

By ALfrg

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updated over 10 years ago by Quek

5 replies • 4198 views
Discussion

Best Practices for Compact Modeling in Verilog-A

Category: Custom IC Design

By Frank Wiedmann

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started over 10 years ago

0 replies • 13404 views

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