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Custom IC Design

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  • Discussion

    Specify custom tool instead of default viewer for log files

    Category: Custom IC Design

    By Andreas W

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    updated over 10 years ago by Andreas W

    4 replies • 13958 views
  • Discussion

    Adding Flicker noise parameter to resistor model

    Category: Custom IC Design

    By jdp721

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    updated over 10 years ago by jdp721

    2 replies • 16299 views
  • Discussion

    ERROR (VACOMP-1008): Cannot compile ahdlcmi module library

    Category: Custom IC Design

    By FormerMember

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    updated over 10 years ago by Andrew Beckett

    2 replies • 2538 views
  • Discussion

    gpdk 180 nm library error

    Category: Custom IC Design

    By eashwar g

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    •

    updated over 10 years ago by eashwar g

    3 replies • 19265 views
  • Discussion

    Reading two data files in the same VerilogA model in a separate way

    Category: Custom IC Design

    By Sali

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    updated over 10 years ago by Andrew Beckett

    1 replies • 13275 views
  • Discussion

    VerilogA model with passive components in the transient analysis

    Category: Custom IC Design

    By Sali

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    updated over 10 years ago by Andrew Beckett

    8 replies • 15057 views
  • Discussion

    move library

    Category: Custom IC Design

    By pejman saleh

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    updated over 10 years ago by Andrew Beckett

    1 replies • 12974 views
  • Discussion

    What is the solution of issue about trannoise with PSP model?

    Category: Custom IC Design

    By mjlee

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    updated over 10 years ago by Andrew Beckett

    1 replies • 13325 views
  • Discussion

    Model file update in saved Artist states

    Category: Custom IC Design

    By ag2888

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    updated over 10 years ago by Andrew Beckett

    4 replies • 14227 views
  • Discussion

    Actual SNR value from FFT on transient analysis data

    Category: Custom IC Design

    By jdp721

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    •

    updated over 10 years ago by Frank Wiedmann

    1 replies • 18181 views
  • Discussion

    Skipping EM Analysis

    Category: Custom IC Design

    By harishgurram

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    •

    started over 10 years ago

    0 replies • 12747 views
  • Discussion

    MOS Bulk Routing Parasitic Resistance Extracted by Assura, But Not Used by ADE Spectre Netlister

    Category: Custom IC Design

    By Stepan

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    •

    updated over 10 years ago by Stepan

    1 replies • 13090 views
  • Discussion

    Issue facing in executing the skill code..

    Category: Custom IC Design

    By varunkumar

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    •

    updated over 10 years ago by Andrew Beckett

    2 replies • 13170 views
  • Discussion

    Noise of a Voltage to Frequency Converter (VFC)

    Category: Custom IC Design

    By justanengineer

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    •

    updated over 10 years ago by Andrew Beckett

    1 replies • 13266 views
  • Discussion

    How to remove the warning popup when traversing layout hierarchy?

    Category: Custom IC Design

    By herbl

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    •

    updated over 10 years ago by Andrew Beckett

    1 replies • 13543 views
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