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Custom IC Design

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  • Discussion

    ic25.1 lib manager doesn't show last modification date

    Category: Custom IC Design

    By sjwprcssw

    •

    started 11 months ago

    0 replies • 575 views
  • Discussion

    Cadence virtuso aging simulation

    Category: Custom IC Design

    By PB202509293935

    •

    updated over 1 year ago by PB202509293935

    4 replies • 3922 views
  • Discussion

    How to rerun just one test of a simulation with 2 test and variable dependency

    Category: Custom IC Design

    By Pedrocasty

    •

    updated over 1 year ago by Yagya Mishra

    3 replies • 3412 views
  • Discussion

    Creating GaN Device Symbol (EPC2001C) from Spectre Model File in Virtuoso

    Category: Custom IC Design

    By AT202509281158

    •

    updated over 1 year ago by Yagya Mishra

    1 replies • 2724 views
  • Discussion

    using output from one point sweep to another

    Category: Custom IC Design

    By RA202502215244

    •

    updated over 1 year ago by Yagya Mishra

    1 replies • 2828 views
  • Discussion

    Virtuoso PEX "Nothing in Layout" Issue

    Category: Custom IC Design

    By AR202509099018

    •

    updated over 1 year ago by Andrew Beckett

    3 replies • 2219 views
  • Discussion

    Issue with Deselecting Labels Having "Text Drawing" Layers in Layout

    Category: Custom IC Design

    By AR202509246930

    •

    updated over 1 year ago by AR202509246930

    4 replies • 1925 views
  • Discussion

    can we ask virtuoso to write its lock or CDS.log somewhere else than $HOME ?

    Category: Custom IC Design

    By ebecheto

    •

    updated over 1 year ago by Andrew Beckett

    4 replies • 4484 views
  • Discussion

    Weird simulation results in latest Spectre Transient Noise Simulation RAK

    Category: Custom IC Design

    By OPump

    •

    started over 1 year ago

    0 replies • 2482 views
  • Discussion

    calculator expression to compare wreal value with voltage value

    Category: Custom IC Design

    By Monica123

    •

    updated over 1 year ago by Monica123

    2 replies • 3623 views
  • Discussion

    Having Maestro report what DSPF view it used for each simulation

    Category: Custom IC Design

    By Mohsen2

    •

    started over 1 year ago

    0 replies • 2118 views
  • Discussion

    ibis2subck for IBIS circuit doesn't extract analogmodel

    Category: Custom IC Design

    By JoseDuarte

    •

    started over 1 year ago

    0 replies • 855 views
  • Discussion

    I am not able to select the layer while drawing a wire or a bus in Layout.

    Category: Custom IC Design

    By skillEater

    •

    updated over 1 year ago by RobMan

    1 replies • 2708 views
  • Discussion

    How to mute WARNING This OS does not appear to be a Cadence supported Linux configuration

    Category: Custom IC Design

    By ebecheto

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 3337 views
  • Discussion

    Modgen: How to add dummy FETs sharing diffusion without issues of marker layers?

    Category: Custom IC Design

    By sceekr

    •

    started over 1 year ago

    0 replies • 3200 views
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