Custom IC Design

Latest Posts

Discussion

Passing Global Variable to Matlab function

Category: Custom IC Design

By eyalg
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started 6 months ago

0 replies • 1376 views
Discussion

Inductor in Cadence Virtuoso

Category: Custom IC Design

By Nalaeg
•
updated 6 months ago by Nalaeg

3 replies • 2550 views
Discussion

Where to Find the Script That Defines Default Corner Settings in a New Maestro View?

Category: Custom IC Design

By baltaci
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updated 6 months ago by Andrew Beckett

1 replies • 1652 views
Discussion

SPICEIN for importing netlisting with pPar expressions

Category: Custom IC Design

By PSKR
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updated 6 months ago by Andrew Beckett

1 replies • 1795 views
Discussion

Metric Prefix

Category: Custom IC Design

By samirc
•
updated 6 months ago by Andrew Beckett

1 replies • 1617 views
Discussion

Open Design in Assembler Test can cause overwriting of the design

Category: Custom IC Design

By StephanWeber
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updated 6 months ago by StephanWeber

4 replies • 1775 views
Discussion

veriloga error between spectre and ams

Category: Custom IC Design

By SimhanAnalog
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updated 6 months ago by SimhanAnalog

4 replies • 2132 views
Discussion

sampled PAC transfer function to discrete step response

Category: Custom IC Design

By david73
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started 6 months ago

0 replies • 1460 views
Discussion

Stability Analysis of a Ramp Generator Circuit in Integration Phase

Category: Custom IC Design

By baltaci
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updated 6 months ago by StephanWeber

4 replies • 2317 views
Discussion

PAM4 eye diagrams in Cadence

Category: Custom IC Design

By TUKA
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updated 6 months ago by TUKA

2 replies • 2084 views
Discussion

Schematic pin highlight

Category: Custom IC Design

By SimhanAnalog
•
updated 6 months ago by Andrew Beckett

2 replies • 2350 views
Discussion

How to Toggle Metal Layer Visibility Sequentially with Bindkeys?

Category: Custom IC Design

By SS202502085313
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updated 6 months ago by Andrew Beckett

3 replies • 2091 views
Discussion

Control position of instance placement in an ihdl imported schematic

Category: Custom IC Design

By mrharris
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updated 6 months ago by Andrew Beckett

1 replies • 1631 views
Discussion

Finding EAD/ICT file for running parasitic Extraction in Virtuoso EXL

Category: Custom IC Design

By AL202502074331
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updated 6 months ago by Andrew Beckett

1 replies • 536 views
Discussion

Y-axis units and labels when plotting from ADE

Category: Custom IC Design

By mikewu999
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updated 6 months ago by Andrew Beckett

2 replies • 1844 views

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