Custom IC Design

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[Maestro] Expression to check whether an asset has been violated in a simulation

Category: Custom IC Design

By PatrikOsgnach

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updated over 7 years ago by PatrikOsgnach

7 replies • 19038 views
Discussion

how to have CLASS BUMP statement under the PORT statement in LEF ?

Category: Custom IC Design

By RoseRivera

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started over 7 years ago

0 replies • 1336 views
Discussion

Generate LEF file through Script

Category: Custom IC Design

By Ishant Anand

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updated over 7 years ago by Andrew Beckett

3 replies • 15886 views
Discussion

VerilogA code error:signal exceeds blowup limit

Category: Custom IC Design

By Sandeep4386

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updated over 7 years ago by Sandeep4386

6 replies • 9293 views
Discussion

Missing Instances - inductor (lsps_otc)

Category: Custom IC Design

By Min Zee

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updated over 7 years ago by Andrew Beckett

1 replies • 3714 views
Discussion

Generate layout.oa for an older version of a layout (sync managed) and store it in an un-managed folder.

Category: Custom IC Design

By chaitdwivedi

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updated over 7 years ago by chaitdwivedi

4 replies • 14858 views
Discussion

Avoid/Blacklist model instance from PDK

Category: Custom IC Design

By HoWei

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updated over 7 years ago by Andrew Beckett

7 replies • 3522 views
Discussion

spectre oceaneval function documentation

Category: Custom IC Design

By StevenMikes

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updated over 7 years ago by Andrew Beckett

5 replies • 14757 views
Discussion

Monte Carlo dist=unif option

Category: Custom IC Design

By Michael H

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updated over 7 years ago by Michael H

4 replies • 1518 views
Discussion

How to plot frequency characteristic of capacitance?

Category: Custom IC Design

By kwsgk

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updated over 7 years ago by kwsgk

6 replies • 19678 views
Discussion

noisetype_off re-ignored

Category: Custom IC Design

By itos

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updated over 7 years ago by itos

2 replies • 13521 views
Discussion

question about the cdf parameters of the switch instance in analoglib

Category: Custom IC Design

By mhkvy4

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updated over 7 years ago by Andrew Beckett

1 replies • 14701 views
Discussion

Accessing parameters in an SOA (asserts) file from the Virtuoso environment

Category: Custom IC Design

By FormerMember

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updated over 7 years ago by FormerMember

2 replies • 4891 views
Discussion

Manipulate and copy from parametric analysis plot

Category: Custom IC Design

By BaaB

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updated over 7 years ago by Dimitra Papazoglou

1 replies • 13436 views
Discussion

Load pull - Differential

Category: Custom IC Design

By LucaA

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updated over 7 years ago by Alex Tiler

2 replies • 4490 views

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