Functional Verification

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Discussion

Print only the file name and exclude file path getting printed in the log file

Category: Functional Verification

By vijey

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updated over 4 years ago by StephenH

1 replies • 12062 views
Discussion

Running SVA for a VHDL design (binding method)

Category: Functional Verification

By quantumion

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updated over 4 years ago by StephenH

2 replies • 14501 views
Discussion

Crossbararray in Veriloga with for loop

Category: Functional Verification

By ZipppyDoctor

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started over 4 years ago

0 replies • 10698 views
Discussion

How to use variable array in laplace_nd function?

Category: Functional Verification

By bikram94

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started over 4 years ago

0 replies • 11441 views
Discussion

convert analog bit to signed decimal with analog bits

Category: Functional Verification

By abdurrahman0234

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started over 4 years ago

0 replies • 10707 views
Discussion

convert bus sıgnal

Category: Functional Verification

By abdurrahman0234

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started over 4 years ago

0 replies • 882 views
Discussion

SEC RTL vs Gatelevel

Category: Functional Verification

By Linux

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updated over 4 years ago by ckomar

1 replies • 11635 views
Discussion

license search order in Xcelium

Category: Functional Verification

By Mugurel

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updated over 4 years ago by Mugurel

2 replies • 15312 views
Discussion

How to avoid rounding during the force of a real variable

Category: Functional Verification

By dumetrijus

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started over 4 years ago

0 replies • 12050 views
Discussion

JasperGold SAT solver capacity

Category: Functional Verification

By Ting199708

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updated over 4 years ago by Ting199708

2 replies • 12946 views
Discussion

Prevent SimVision Schematic Viewer from Re-Zooming/Centering after tracing a signal?

Category: Functional Verification

By BairStrokes

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updated over 4 years ago by Doug Koslow

1 replies • 2042 views
Discussion

IEEE float radix in Simvision

Category: Functional Verification

By yavuzselim

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updated over 4 years ago by StephenH

11 replies • 21391 views
Discussion

black box in the lec cause the mismatch

Category: Functional Verification

By tnt794

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started over 4 years ago

0 replies • 12031 views
Discussion

getting xrun to quit on error during simulation

Category: Functional Verification

By Chris Jones

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updated over 4 years ago by Chris Jones

4 replies • 20765 views
Discussion

Is there a way to view what line of HDL code is being executed at the moment in XMSim?

Category: Functional Verification

By yavuzselim

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updated over 4 years ago by yavuzselim

2 replies • 16392 views

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