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Functional Verification

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  • Discussion

    Crossbararray in Veriloga with for loop

    Category: Functional Verification

    By ZipppyDoctor ZipppyDoctor

    •

    started over 4 years ago

    0 replies • 10049 views
  • Discussion

    How to use variable array in laplace_nd function?

    Category: Functional Verification

    By bikram94 bikram94

    •

    started over 4 years ago

    0 replies • 10726 views
  • Discussion

    convert analog bit to signed decimal with analog bits

    Category: Functional Verification

    By abdurrahman0234 abdurrahman0234

    •

    started over 4 years ago

    0 replies • 10041 views
  • Discussion

    convert bus sıgnal

    Category: Functional Verification

    By abdurrahman0234 abdurrahman0234

    •

    started over 4 years ago

    0 replies • 839 views
  • Discussion

    SEC RTL vs Gatelevel

    Category: Functional Verification

    By Linux Linux

    •

    updated over 4 years ago by ckomar

    1 replies • 10905 views
  • Discussion

    license search order in Xcelium

    Category: Functional Verification

    By Mugurel Mugurel

    •

    updated over 4 years ago by Mugurel

    2 replies • 14200 views
  • Discussion

    How to avoid rounding during the force of a real variable

    Category: Functional Verification

    By dumetrijus dumetrijus

    •

    started over 4 years ago

    0 replies • 11292 views
  • Discussion

    JasperGold SAT solver capacity

    Category: Functional Verification

    By Ting199708 Ting199708

    •

    updated over 4 years ago by Ting199708

    2 replies • 12114 views
  • Discussion

    Prevent SimVision Schematic Viewer from Re-Zooming/Centering after tracing a signal?

    Category: Functional Verification

    By BairStrokes BairStrokes

    •

    updated over 4 years ago by Doug Koslow

    1 replies • 1888 views
  • Discussion

    IEEE float radix in Simvision

    Category: Functional Verification

    By yavuzselim yavuzselim

    •

    updated over 4 years ago by StephenH

    11 replies • 19869 views
  • Discussion

    black box in the lec cause the mismatch

    Category: Functional Verification

    By tnt794 tnt794

    •

    started over 4 years ago

    0 replies • 11346 views
  • Discussion

    getting xrun to quit on error during simulation

    Category: Functional Verification

    By Chris Jones Chris Jones

    •

    updated over 4 years ago by Chris Jones

    4 replies • 18879 views
  • Discussion

    Is there a way to view what line of HDL code is being executed at the moment in XMSim?

    Category: Functional Verification

    By yavuzselim yavuzselim

    •

    updated over 4 years ago by yavuzselim

    2 replies • 15331 views
  • Discussion

    ROM design

    Category: Functional Verification

    By ASHA PON ASHA PON

    •

    started over 4 years ago

    0 replies • 11278 views
  • Discussion

    Cross coverage of two covergroups

    Category: Functional Verification

    By sriganeshd sriganeshd

    •

    updated over 4 years ago by StephenH

    1 replies • 15485 views
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