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Logic Design

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  • Discussion

    Place Fiducials

    Category: Logic Design

    By gonuclear

    •

    updated over 17 years ago by gonuclear

    1 replies • 15035 views
  • Discussion

    How to count number of paths in RTL-compiler group?

    Category: Logic Design

    By dkos

    •

    updated over 17 years ago by grasshopper

    5 replies • 9243 views
  • Discussion

    How to view the property of Mosfet in my CSM018 technology?

    Category: Logic Design

    By Henry Hwa

    •

    updated over 17 years ago by grasshopper

    1 replies • 14606 views
  • Discussion

    setenv command in RTL Compiler

    Category: Logic Design

    By dkos

    •

    updated over 17 years ago by dkos

    4 replies • 8317 views
  • Discussion

    Problem with ORCAD Capture Simulation

    Category: Logic Design

    By scdr

    •

    updated over 17 years ago by Amritapuri

    3 replies • 6657 views
  • Discussion

    OrCAD INI File Administrator

    Category: Logic Design

    By pcplod

    •

    updated over 17 years ago by grasshopper

    1 replies • 14836 views
  • Discussion

    Conformal Crashes for large designs

    Category: Logic Design

    By archive

    •

    updated over 17 years ago by HPC-SMP1

    4 replies • 16353 views
  • Discussion

    LEC : Asynchronous Reset Issue

    Category: Logic Design

    By automotive

    •

    updated over 18 years ago by Jaydip Mehta

    1 replies • 15349 views
  • Discussion

    Ideal net in ETS

    Category: Logic Design

    By Jaydip Mehta

    •

    updated over 18 years ago by grasshopper

    3 replies • 16213 views
  • Discussion

    IMPORTANT NOTE: O/S Requirements for Conformal 8.1 and newer

    Category: Logic Design

    By Kenneth Chang

    •

    started over 18 years ago

    0 replies • 677 views
  • Discussion

    Problem with un-mapped elements

    Category: Logic Design

    By archive

    •

    updated over 18 years ago by malexgreen

    6 replies • 20743 views
  • Discussion

    constant propagation in RC

    Category: Logic Design

    By designer

    •

    started over 18 years ago

    0 replies • 14546 views
  • Discussion

    CDC (Clock Domain Crossing)

    Category: Logic Design

    By kunal1514

    •

    started over 18 years ago

    0 replies • 15164 views
  • Discussion

    when and how to use set_clock_latency in RC

    Category: Logic Design

    By BACKMAN

    •

    started over 18 years ago

    0 replies • 15019 views
  • Discussion

    Capture>>Accessories>>Aliasrot

    Category: Logic Design

    By Parveen

    •

    started over 18 years ago

    0 replies • 1037 views
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