Mixed-Signal Design

Latest Posts

Discussion

AMS Designer Interface Element automation

Category: Mixed-Signal Design

By AB_1718784850873
•
started over 1 year ago

0 replies • 5122 views
Discussion

[dynamic node capacitance check][couldn't find the check results]

Category: Mixed-Signal Design

By IssacW
•
updated over 1 year ago by IssacW

3 replies • 2555 views
Discussion

Importing mixed-language design (Verilog + VHDL) in Virtuoso AMS

Category: Mixed-Signal Design

By AB_1719514544766
•
updated over 1 year ago by Andrew Beckett

3 replies • 7630 views
Discussion

[explicit parameter sweeping][netlisting/simulation always pending]

Category: Mixed-Signal Design

By IssacW
•
updated over 1 year ago by IssacW

9 replies • 5301 views
Discussion

HB simulation with multiple square-wave signal

Category: Mixed-Signal Design

By AB_1719406998389
•
updated over 1 year ago by AB_1719406998389

6 replies • 8030 views
Discussion

PSS + PNOISE Simulation Problem for the PLL

Category: Mixed-Signal Design

By MtnDew12fl
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updated over 1 year ago by MtnDew12fl

2 replies • 6250 views
Discussion

[Verilog-AMS][Xcelium version]

Category: Mixed-Signal Design

By IssacW
•
updated over 2 years ago by IssacW

6 replies • 6199 views
Discussion

Floorplanning Problems in Mixed-Signal Design with Digital Block Pins Optimization

Category: Mixed-Signal Design

By Layouter5338
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started over 2 years ago

0 replies • 4977 views
Discussion

xmelab: *E,CUVHNF error using Xcelium 19.09-s008

Category: Mixed-Signal Design

By markris
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updated over 2 years ago by markris

4 replies • 5150 views
Discussion

Deepprobe within systemverilog hierarchy

Category: Mixed-Signal Design

By NewScreenName
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updated over 2 years ago by NewScreenName

7 replies • 9612 views
Discussion

how to fix the cdl file import error in virtuoso, please expert help on it.

Category: Mixed-Signal Design

By axlrose2138
•
started over 2 years ago

0 replies • 5407 views
Discussion

Virtuoso AMS error

Category: Mixed-Signal Design

By Emily157
•
updated over 2 years ago by Emily157

7 replies • 9712 views
Discussion

AMS *F,MAXERR: Maximum error count of 50 reached (Total number of errors detected were 50).

Category: Mixed-Signal Design

By nonameirvine
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started over 2 years ago

0 replies • 1921 views
Discussion

Switched capacitance / Variable capacitor

Category: Mixed-Signal Design

By HHOSSAM
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updated over 2 years ago by Frank Wiedmann

1 replies • 6145 views
Discussion

Compile and elaborate problem with VerilogA blocks in AMS simulation

Category: Mixed-Signal Design

By zhaoyu
•
started over 2 years ago

0 replies • 6106 views

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