• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      Charlie
      Charlie 110 Points
    • 2
      eDave
      eDave 70 Points
    • 3
      oldmouldy
      oldmouldy 55 Points
    • 4
      ShawnLogan
      ShawnLogan 50 Points
    • 5
      Elecguy
      Elecguy 40 Points
  • Leaderboard

    • 1
      steve
      steve 17,734 Points
    • 2
      oldmouldy
      oldmouldy 13,695 Points
    • 3
      eDave
      eDave 10,331 Points
    • 4
      ShawnLogan
      ShawnLogan 9,710 Points
    • 5
      skillUser
      skillUser 7,498 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    Execute multiple Shell commands in order

    Category: Custom IC SKILL

    By vtboy51

    •

    updated over 4 years ago by henker

    1 replies • 13972 views
  • Discussion

    assign net name to mechanical hole

    Category: Allegro X PCB Editor

    By Narside

    •

    updated over 4 years ago by Wild

    3 replies • 3512 views
  • Discussion

    How to run encrypted Pspice model in Cadence?

    Category: Custom IC Design

    By Firdos

    •

    updated over 4 years ago by Frank Wiedmann

    1 replies • 11827 views
  • Discussion

    Relative path for Ocean script in Maestro

    Category: Custom IC Design

    By FormerMember

    •

    updated over 4 years ago by FormerMember

    1 replies • 5448 views
  • Discussion

    Opening HDL schematic

    Category: PCB Design

    By Lock2002

    •

    updated over 4 years ago by oldmouldy

    1 replies • 10562 views
  • Discussion

    SV: How to name an unnamed block

    Category: Functional Verification

    By SysTom

    •

    updated over 4 years ago by Brats

    6 replies • 27157 views
  • Discussion

    Unexpected Skill behaviour with disembodied property lists

    Category: Custom IC SKILL

    By FormerMember

    •

    updated over 4 years ago by AaronSymko

    3 replies • 5561 views
  • Discussion

    Move the ASSEMBLY ref des to the same location as the SILKSCREEN ref des.

    Category: Allegro X PCB Editor

    By FuzzzB

    •

    updated over 4 years ago by FuzzzB

    1 replies • 12256 views
  • Discussion

    skipping digital registers in analog extracted simulations

    Category: Custom IC Design

    By Mohamayreh

    •

    updated over 4 years ago by FormerMember

    1 replies • 10170 views
  • Not Answered

    Enable intertool communication from Capture to PCB Designer, but disable it from PCB Designer to Capture

    Category: Allegro X Capture CIS

    By whooo

    •

    updated over 4 years ago by whooo

    2 replies • 11031 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information