• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      Aurel B
      Aurel B 69 Points
    • 2
      oldmouldy
      oldmouldy 55 Points
    • 3
      AC20250829806
      AC20250829806 50 Points
    • 3
      SD20251126912
      SD20251126912 50 Points
    • 3
      SM202511279440
      SM202511279440 50 Points
  • Leaderboard

    • 1
      steve
      steve 17,729 Points
    • 2
      oldmouldy
      oldmouldy 13,680 Points
    • 3
      eDave
      eDave 10,261 Points
    • 4
      ShawnLogan
      ShawnLogan 9,660 Points
    • 5
      skillUser
      skillUser 7,488 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Not Answered

    OrCAD X Presto PCB 23.1 : How to change the layer of a ref design

    Category: OrCAD X Presto PCB

    By SamTronic

    •

    updated over 1 year ago by mahimag

    7 replies • 2988 views
  • Suggested Answer

    AD8338ACPZ-R7

    Category: PSpice

    By GM202407172538

    •

    updated over 1 year ago by HIMS

    4 replies • 3442 views
  • Discussion

    Behavioral modeling of clock gating for efficient analog simulations (Spectre)

    Category: Custom IC Design

    By ItsMichael

    •

    updated over 1 year ago by Alonso Schmidt

    1 replies • 3457 views
  • Discussion

    Performing a net trace in a CDL file

    Category: Custom IC SKILL

    By MSP032

    •

    started over 1 year ago

    0 replies • 3006 views
  • Discussion

    Migration to new operating system and force compiled model recompile

    Category: Custom IC Design

    By JayBee

    •

    updated over 1 year ago by TomasMelander

    7 replies • 5932 views
  • Discussion

    Move Metal offgrid back on grid

    Category: Custom IC Design

    By TobyK

    •

    updated over 1 year ago by RobMan

    1 replies • 3155 views
  • Discussion

    Modgen is very slow

    Category: Custom IC SKILL

    By BartEbalobo

    •

    updated over 1 year ago by Andrew Beckett

    10 replies • 6304 views
  • Discussion

    Some error while running Quantus(Assura) Parasitc extraction run form

    Category: Custom IC Design

    By Sameerpy

    •

    started over 1 year ago

    0 replies • 743 views
  • Suggested Answer

    Automatically export .PXML file from padstack editor

    Category: Allegro X PCB Editor

    By leetzeyin59

    •

    updated over 1 year ago by DavidJHutchins

    2 replies • 4083 views
  • Answered

    Copy Clines Creates DRC

    Category: Allegro X PCB Editor

    By PK20240920135

    •

    updated over 1 year ago by PK20240920135

    8 replies • 5407 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information