• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      avant
      avant 50 Points
    • 1
      OleKri
      OleKri 50 Points
    • 1
      HP20260601263
      HP20260601263 50 Points
    • 4
      RM202605273230
      RM202605273230 25 Points
    • 5
      JV202605125312
      JV202605125312 20 Points
  • Leaderboard

    • 1
      steve
      steve 17,859 Points
    • 2
      oldmouldy
      oldmouldy 13,830 Points
    • 3
      eDave
      eDave 10,381 Points
    • 4
      ShawnLogan
      ShawnLogan 9,725 Points
    • 5
      skillUser
      skillUser 7,518 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    Issue with Skywater 130 Monte Carlo Mismatch Analysis

    Category: Custom IC Design

    By VLSI lab IITB

    •

    updated 6 months ago by Andrew Beckett

    6 replies • 3504 views
  • Discussion

    Share Your Experience: Using Cadence License Manager on Unsupported Operating Systems

    Category: Licensing and Installation

    By Prabal

    •

    started 6 months ago

    0 replies • 1052 views
  • Discussion

    Accessing SKILL runtime error locations outside the IDE (Vim workflow)

    Category: Custom IC SKILL

    By Trevor F

    •

    updated 6 months ago by Trevor F

    8 replies • 3772 views
  • Discussion

    gpdk045 (sram) memory compiler?

    Category: Custom IC Design

    By GS202507021424

    •

    started 6 months ago

    0 replies • 1702 views
  • Discussion

    Imported newly created calcVal expressions from csv file into outputs results in "eval error"

    Category: Custom IC Design

    By rod1

    •

    updated 6 months ago by rod1

    1 replies • 536 views
  • Discussion

    verifOpenCellView

    Category: Custom IC SKILL

    By PB202509293935

    •

    updated 6 months ago by PB202509293935

    2 replies • 1943 views
  • Discussion

    Is there a way to get the dbID of or select the layers Highlighted/probed using leHiMarkNet() in Virtuoso Layout Editor using SKILL.

    Category: Custom IC SKILL

    By NM202506199454

    •

    updated 6 months ago by Aurel B

    4 replies • 1740 views
  • Discussion

    Error 'Failed to load module "xapp-gtk3-module"' when running 'install_manager_fidelity_LINUX_2025.1-1.exe' in Fidelity CFD 2025.1-1

    Category: Installation

    By Gaurav

    •

    started 6 months ago

    0 replies • 2587 views
  • Not Answered

    Introducing our new Application Note on RF Power Amplifier Design

    Category: AWR Design Environment

    By CurtisAWR

    •

    started 6 months ago

    0 replies • 971 views
  • Discussion

    ADE Parameters : mapping DPAR <-> device parameter in ADE

    Category: Custom IC SKILL

    By kkdesbois

    •

    updated 6 months ago by Andrew Beckett

    9 replies • 4886 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information