Community

Blogs
Forums
Resources

Latest Forum Posts

Visit the User Forums »

Latest Blog Posts

Breakfast Bytes: Designing Chips for Hyperscale Data Centers: Tools

Paul McLellan

Yesterday's post, Designing Chips for Hyperscale Data Centers: IP, covered the high-performance IP that is most useful in designing hyperscale cloud data centers. Today, it is the turn of the tools required to design SoCs, boards, and whole systems ...
- 10 Apr 2020
Digital Design: Genus Synthesis Solution – Introduction to Stylus Common UI

Neha Joshi

The Cadence® Genus Synthesis Solution, Innovus Implementation System, and Tempus Timing Signoff Solution have a lot of shared functionality, but in the past, the separate legacy user interfaces (UIs) created a lot of differences.

A new common user interface that the Genus solution shares with the Innovus and Tempus solutions streamlines flow development and simplifies usability across the complete Cadence digital flow…
- 9 Apr 2020
Breakfast Bytes: Designing Chips for Hyperscale Data Centers: IP

Paul McLellan

Last week I wrote two posts about the progression from the first commercial computers to today's hyperscale cloud data centers. Those posts were: Getting to Hyperscale Data Centers: Mainframes to Minicomputers Getting to Hyperscale Data Centers...
- 9 Apr 2020
Digital Design: Quantus' Substrate Noise Analysis Functionality: RF Spurs Impacting Your Performance? Not Anymore!

Hitendra

Is there anything called pindrop silence? Oh yes, I experienced the sound of silence when I visited an acoustic anechoic chamber. I could hear my own heartbeat, vibration of my cells, and the fluids running through my veins. The absence of sound was ...
- 8 Apr 2020
Breakfast Bytes: Online Support? There's an App for That!

Paul McLellan

You are probably working from home. So is pretty much everyone at Cadence, too. This might make getting support a little trickier than normal. No application engineer is going to be dropping by your office on a regular basis...not that you will be t...
- 8 Apr 2020
Learning and Support: Learn SVA If You Know PSL and Learn PSL If You Know SVA

XTeam

Training Bytes, Cadence’s self-paced learning videos, are the solution for you to get immediate answers to your specific questions. No waiting, no cost, no travel! With Training Bytes, you can focus on one topic and get up to speed with just a ...
- 7 Apr 2020
Academic Network: Remotely Using Cadence Tools and Licenses (part 2)

Anton Klotz

After we have shown how to get remote access to Cadence licenses and tools, the next step would be to take advantage of educational material provided by Cadence. These resources are intended to increase your knowledge about Cadence tools and design f...
- 7 Apr 2020
System, PCB, & Package Design : BoardSurfers: Training Insights: Loading SKILL Programs Automatically

Shreyansh

Imagine you are on a vacation with your family, and suddenly, your phone starts buzzing. You pick it up and what are you looking at is a bunch of pending, unanswered e-mails. You start recollecting the checklist you had made before taking off only to realize that you haven’t put on the automatic replies!
- 7 Apr 2020
System, PCB, & Package Design : IC Packagers: A New Option in Bond Finger Solder Mask Openings

Tyler

If you design wire bond packages, you’re familiar with the need for the bond fingers and rings on the package substrate layers to be exposed through the solder mask layer. If they aren’t, it becomes… rather difficult… to bon...
- 7 Apr 2020
Breakfast Bytes: The Dynamic Duo

Paul McLellan

In the DC Comics world, the "Dynamic Duo" are Batman and Robin. In the Cadence product world, they are the Palladium and Protium platforms. Or Palladium Z1 and Protium X1 to give their last names, too. The Palladium Z1 provides emulation, ...
- 7 Apr 2020
Digital Design: Innovus Implementation System: What Is Stylus UI?

VNelson
Hi Everyone,

Many of you would have heard about the Cadence Stylus Common UI and are wondering what it is and what the advantages might be to use it versus legacy UI.

The webinar answers the following questions:

Why did Cadence develop Stylus UI and what is Stylus Common UI?

How does someone invoke and use the Stylus Common UI?

What are some of the important and useful features of the Stylus Common UI?

What are the key…
- 6 Apr 2020
Analog/Custom Design: Virtuoso Meets Maxwell: What About My Die That Has No Bumps, Only Pad Shapes? How Do I Export That?

Kabir

If you have one of those Die layouts, which doesn’t have bumps, but rather uses pad shapes and labels to identify I/O locations, then you might be feeling a bit left out of all of this jazz and tango. Hence, today, I am writing to tell you that, fear not, we have a solution for your Die as well.
- 6 Apr 2020
Breakfast Bytes: From Castles and Moats to Zero-Trust Networking

Paul McLellan

The way that we handle enterprise security has changed dramatically. In the days of desktop computers and no internet, we divided the world into two: the castle, and outside, with a moat dividing the two. The moat and its associated drawbridge was t...
- 6 Apr 2020
定制IC芯片设计 : Virtuoso视频日记：“Training bytes”助推知识传播—第1部分

Dishika Majumdar

本文将以简短的方式介绍 Cadence Education Services网站，让您了解其已上线的一些在线培训课程以及Virtuoso产品特定功能相关的文章。
- 6 Apr 2020
Breakfast Bytes: Sunday Brunch Video for 5th April 2020

Paul McLellan

www.youtube.com/watch Made in my living room (camera Carey Guo) Monday: RSA: Emerging Threats, Ransomware, and IoT Tuesday: Linley Spring Processor Conference—In Your Own Living Room Wednesday: The Integrand Story Thursday: Getting to Hyperscal...
- 5 Apr 2020
Breakfast Bytes: Getting to Hyperscale Data Centers: PCs to Clouds

Paul McLellan

This post is a continuation of yesterday's post, Getting to Hyperscale Data Centers: Mainframes to Minicomputers. It continues the story from minicomputers to PCs, and then to today's environment of hyperscale data centers for "big iron...
- 3 Apr 2020
Breakfast Bytes: Getting to Hyperscale Data Centers: Mainframes to Minicomputers

Paul McLellan

Over the years, the way computing has been delivered has gone through a number of cycles. Like most things in life, this is mostly driven by underlying economics that changes over time: what is the best way to deliver everyone the computer resources...
- 2 Apr 2020
System, PCB, & Package Design : BoardSurfers: Allegro In-Design IR Drop Analysis: Essential for Optimal Power Delivery Design

Shirin Farrahi

All PCB designers know the importance of proper power delivery for successful board design. Integrated circuits need the power to turn on, and ICs with marginal power delivery will not operate reliably. Since power planes can...
- 1 Apr 2020
Breakfast Bytes: The Integrand Story

Paul McLellan

Recently, Cadence acquired Integrand Software. I wrote a post about it, Designing Radios: Integrand, a few days later. As I said there: I was actually on the list of "need-to-know" employees on the acquisition, and so I went to the Integr...
- 1 Apr 2020
定制IC芯片设计 : Virtuosity：2019年Virtuoso Place and Route的博客之旅

Parula

为了支持Virtuoso 布局和布线的各种新功能和增强功能，我们的技术专家和作家合作在 2019 年发布了一些内容丰富的博客。此博客是对Virtuoso Placement and Routing博客之旅的一个简要介绍，并为您提供了一个方便的摘要。使您在闲暇时轻松阅读这些博客
- 31 Mar 2020
Life at Cadence: Cadence Celebrates Women's History Month!

Mary Kasik

Women’s History Month recognizes the contributions of women to our history and society. It is a time to reflect on women’s achievements and encourage the continued advancement of gender equality. At Cadence, we want to recognize the women...
- 31 Mar 2020
System, PCB, & Package Design : IC Packagers: Don’t Get Stranded on Islands, Delete Them!

Tyler

No, this isn’t a Hollywood movie. We’re talking about pieces of plane shapes with no connections to them, not an idyllic private oasis in the Caribbean (sorry). Removing shape islands is something you’ve always been able to do in th...
- 31 Mar 2020
Digital Design: Are You Stuck While Synthesizing Your Design Due to Low-Power Issues? We Have the Solution!

Neha Joshi

Optimizing power can be a very convoluted and crucial process. To make design chips meet throughput goals along with optimal power consumption, you need to plan right from the beginning!
- 31 Mar 2020
Breakfast Bytes: Linley Spring Processor Conference—In Your Own Living Room

Paul McLellan

The annual Linley Spring Processor Conference is coming up next week. It was planned to be in the Santa Clara Hyatt as always, spread over two full days. Well, that's obviously not happening. Instead, the event is going virtual and is spread over fo...
- 31 Mar 2020
Breakfast Bytes: RSA: Emerging Threats, Ransomware, and IoT

Paul McLellan

I attended the recent RSA Conference in San Francisco. I wrote a post about some of the opening sessions, and the closing session, in RSA 2020: From Sulu to Penn & Teller. The Monday of the conference had some special sessions. The one I attended...
- 30 Mar 2020

Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.