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In this week’s Whiteboard Wednesdays video, Shin Chan Kang explains how the Cadence Interconnect Workbench (IWB) helps you with SoC interconnect verification and performance analysis by auto-generating your UVM environment, and also provides functional coverage and performance metrics like bandwidth and latency.

https://youtu.be/FeaCSCsU8g4

In part one of this series, we talked about the role of the hardware designer, specifically comparing the ideal version of the hardware designer with the real-world version. From the emails I received, this is a bittersweet reality for many readers of this blog.

Today, we will revisit the life of a hardware designer whose company, like most of the leading semiconductor companies, is using a hardware design paradigm that…

https://youtu.be/ygs0CEZXtAI

Coming from Mobile World Congress, Barcelona, Spain

Monday: MWC: Overview of the Conference

Tuesday: MWC; Major Trends in Mobile: Dream vs Reality

Wednesday: MWC: third report

Thursday: Global Foundries Silicon P...

FPGA prototyping is a very attractive tool for some aspects of verification. Apart from actually getting silicon back from manufacturing, it is the fastest model of a chip that you can get. It is really only appropriate very late in the design cycle,...

This morning, Cadence announced two new products in the verification space: Xcelium, and Protium S1. The Cadence implementation and signoff products now all end in "US" (well, you have to squint to make Joules work, because the "U" and the "S" separated...

After the successful Tensilica Day at Hanover University last year (presentations, blog), it was quite a no-brainer to suggest having another one year later. To make an appealing program is already harder, but the Institute for Microelectronic System...

Here’s how you can create expressions using the Expression Builder in 4 easy steps, and just to remind you, you won’t need to use the calculator:

How many times have you opened the calculator and been completely overwhelmed by the sheer number of options? Then you try to create an expression but don't know where to start and then find out that you are in RPN mode?

Well the Expression Builder will be…

I was DesignCon recently. It is a bit of a weird conference, since it covers a wide range of topics, and the exhibition is even weirder—ranging from $200,000 oscilloscopes, to Cadence IP and signal integrity tools, to people selling specialized gold coaxial...

From February 27th to March 2nd it is Mobile World Congress (MWC) in Barcelona, Spain. CES in Las Vegas is the conference for consumer electronics, and although there are mobile phones around, the big conference for mobile is MWC. This is where new handsets...

https://youtu.be/RIkl4O5Q-V4

Coming from inside the Intel Museum, Santa Clara

Monday: Embargoed release

Tuesday: Embargoed release

Wednesday: Embargoed release

Thursday: Preview of Cadence at Mobile World Congress

Friday: Intel Investor Day

You might have seen the graph below about the increase in monthly internet traffic around the world. Ever wondered what was causing it?

If you think all that traffic is simply due to people binge-watching House of Cards on Netflix, or uploading the...

Ok, I admit it… that title is a blatant attempt to grab your attention. But it should also make you think.  As a hardware designer, is your job great? Is it what you thought you’d be doing when you decided to become a designer? Is it, dare I say, fun?

Or, like I hear so many times especially from those designing embedded integrated circuits, are you too bogged down in the muck of cranking out hardware implementations…

When Cadence first acquired RocketSim, I wrote a post, Omnia Simulation in Tres Partes Divisa Est, about how simulation was like Gaul, divided into three parts. The three parts were:

1. Interpreted simulation (byte codes called p-code, an outgrowth of...

In this week's Whiteboard Wednesdays video, Dharini SubashChandran explains how to control the behavior of memory models during simulation.

https://youtu.be/EVqPHU6TKVY

A generic Internet of Things (IoT) device consists of some sensors, some computations, and a wireless interface. (There are other types of designs but those are the basics.) IoT devices are characterized by requiring extremely long battery life, perhaps...

The recent embedded neural network symposium held at Cadence wrapped up with a panel session. Chris Rowen was the moderator and I think the panelists were Han Song, Ren Wu, Forest Iandola, Kai Yu and Jeff Bier (who all presented earlier...

In addition to being the master of ceremonies for the recent embedded neural network symposium, Chris Rowen also presented his own thoughts. Chris used to be the CTO of Tensilica, and after Cadence acquired them he became the CTO of the IP group. Last...

The keynote at the recent Embedded Neural Network Symposium held recently at Cadence was given by Kunle Olukotun who is a professor at Stanford sponsored by Cadence. His keynote was titled Scaling Machine Learning Performance with Moore's Law. He...

In this week's Whiteboard Wednesdays video, Nimrod Reiss discusses the challenges of verifying a coherent interconnect such as snoop filtering, throughput and latency, and dealing with third-party interconnects.

www.youtube.com/watch

Jeff Bier is the founder of the Embedded Vision Alliance, which runs the annual Embedded Vision Summit (and other things). You won't be surprised to learn that his talk at the Embedded Neural Network Seminar was on embedded vision, titled When Every...

Cadence Academic Network recently participated in the 2016 IEEE and CEDA Workshop on Electronic Design Automation (EDA) in Taipei. The event attracted over 200 attendees from academia.  This workshop was a unique opportunity for Cadence users to share...

https://youtu.be/EVZ4T8TPim8

Coming from inside a Microsoft Hololens

Monday: High Speed Parallel Simulation

Tuesday: Embargoed release tied to SPIE Advanced Lithography

Wednesday: Embargoed release tied to Mobile World Congress (MWC)

Thursday...

Have you ever plotted an eye diagram in Virtuoso Visualization and Analysis XL and wished that you could overlay an industry standard eye mask to see if your diagram is compliant? Well, now you can! The new tab, Eye Mask, in the Eye Diagram assistant helps you apply a mask from the following industry standards:

• HDMI Compliance
• HDMI 2.0 TP2EQ (Data Rate 3.4G to 3.712G)
• HDMI 2.0 TP2EQ (Data Rate 5.9G to 6G)
• MIPI…