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Analog/Custom Design: Spectre Tech Tips: Spectre APS Save Overview - Part 2

Stefan Wuensche

As an analog/mixed-signal designer, verification engineer, or CAD expert, you use Spectre APS for analyzing your designs. Saving node voltages, element, and subcircuit port currents and power is an essential part when simulating your designs. Over the years, incremental additions to the Spectre waveform writing functionality have made it more complex. In SPECTRE17.1 ISR15, and SPECTRE18.1 ISR7 releases, we’ve consolidated…
- 28 Jun 2019
Breakfast Bytes: Aerospace: the View from Paris

Paul McLellan

I was recently at the Paris Air Show. Despite it sounding like the sort of event where you might go and watch the Blue Angels perform, it is actually the biggest aerospace and defense show in the world, and takes place at the relatively small airport...
- 28 Jun 2019
Breakfast Bytes: DAC: Digital Lunch Does Not Mean Finger Food

Paul McLellan

The Cadence lunch on Tuesday was the turn of digital with the panel set to consider Machine Learning and Its Impact on the Digital Design Engineer. The panel was moderated by Professor Andrew Kahng of UC San Diego. The panelists were: Vishal Sarin, ...
- 27 Jun 2019
Breakfast Bytes: DAC: Opening Lunchboxes and Closing Mixed-Signal Verification

Paul McLellan

The analog/mixed-signal lunch at DAC got moved to Monday this year, since we had made the Spectre X Simulator announcement that morning. For details on that, see my post Spectre X: Same Accuracy, New Speed. The topic this year was Closing Analog...
- 26 Jun 2019
The India Circuit: The 5G Revolution: Viewpoints from Qualcomm, NXP, and MediaTek

Madhavi Rao

A few weeks ago, Cadence hosted an interesting panel discussion that talked about how AI is going to impact various industries. Panelists included Prosit Mukherjee from Qualcomm, Sanjay Gupta from NXP, and Rajbir Singh from MediaTek, and was moderate...
- 25 Jun 2019
Whiteboard Wednesdays: Whiteboard Wednesdays – The Reason Why the Vision Q7 DSP Should be in Your Vision and AI SoC

References4U

In this week’s Whiteboard Wednesdays video, Shrinivas Gadkari goes into great detail on the simultaneous localization and mapping (SLAM) algorithm and why floating-point support is important. Support for these features is why the Vision Q7 DSP should be in your vision and AI SoC.

https://youtu.be/XQHRp0GnJpI
- 25 Jun 2019
Analog/Custom Design: Virtuoso Meets Maxwell: Virtuoso RF Solution - Revolution Begins with a Common Goal for One Flow

michaelthompson

I am traveling home from the heart of the revolutionary Boston, Massachusetts, where I attended IMS 2019. It was indeed a fantastic show with a fitting location that has the history of inception of MIT Radiation Labs in early 1940s. These labs were renamed as Lincoln Labs in 1951. It was the birth of the modern microwave theory and design. Many of the 28-volume radiation lab series remain relevant even today with Samuel…
- 25 Jun 2019
Verification: Tales from DAC: A Meeting of Security's Heroes at the Accellera Luncheon (Part 2 of 2)

XTeam

Welcome back to this account of the IP Security Panel at the Accellera Luncheon at DAC 2019. We’ve covered who’s seated on the panel and the moderator’s questions in the last installment (link to first blog)—now it’s time to talk about what the audience had to ask.

The first question asked was related to that morning’s keynote speaker, and that speaker’s one criteria for IP developers with…
- 25 Jun 2019
System, PCB, & Package Design : IC Packagers: The Spaces Between Your Dies

Tyler

Die stacks are starting to look more like skyscrapers every year. If your packages involved vertical stacks of components of any kind, then you know there is more involved in stacking your dies than just the components themselves. What about interpos...
- 25 Jun 2019
Breakfast Bytes: 12% Is Not Enough: Women in Engineering

Paul McLellan

At CDNLive EMEA, there was a Women's track and the first presentation was by Elizabeth Donnelly, the CEO of the Women's Engineering Society (of the UK), titled 12% Is Not Enough, Changing Industry to Support Women in Engineering. I should emp...
- 25 Jun 2019
System, PCB, & Package Design : BoardSurfers - Aerials and Bails: Take a Walk on the Wild Side...with Auto-Roaming

Tyler

We have had this question before, so it’s a good one to remind everyone of in case you’re not aware of it. What I usually hear asked is how can you have the tool automatically pan/roam when your cursor gets to the edge of the canvas.

The good news is that this is there today for you; it may just be that you don’t realize it! To make sure that you don’t pan the canvas at times when you don’t intend to, you…
- 25 Jun 2019
Life at Cadence: Cadence: A Great Place to Work—Asia

FormerMember

For the first time ever, Great Place to Work ranked Cadence as the #15 Best Place to Work in Asia. Cadence was chosen from a pool of nearly 1,200 organizations based on how our employees in Greater China, Korea, and India responded to survey question...
- 25 Jun 2019
Academic Network: International Symposium on Physical Design 2019

Kira Jones

The International Symposium on Physical Design (ISPD) contest is a well-known competition in the EDA field, where the main idea is to have EDA companies share the industrial problems they are facing with the academic community to drive practical rese...
- 24 Jun 2019
Breakfast Bytes: Intel and PSS...and Simics, a Blast from My Past

Paul McLellan

One of the newest standards in verification is PSS, the Portable Stimulus Standard. Whereas UVM is focused on verification of blocks and chips, PSS addresses how to do verification at the system level, where there are multiple processors, with multip...
- 24 Jun 2019
Verification: Tales from DAC: A Meeting of Security's Heroes at the Accellera Luncheon (Part 1 of 2)

XTeam

Figure 1: The panel and crowd
Citizens—the tech world is in trouble. With the ever-expanding size and complexity of chip designs, security hasn’t kept up. Old techniques for securing a design are no longer sufficient—and with IoT devices expanding into every facet of a person’s life, security is more important than ever. The often-joked-about case of someone hacking your refrigerator isn’t strictly a joke—without proper…
- 24 Jun 2019
Breakfast Bytes: Sunday Brunch Video for 23rd June 2019

Paul McLellan

https://youtu.be/6GUoDQkSoLY Made at Paris Air Show (camera Simon Fielding) Monday: Designing a Wi-Fi HaLow Baseband in Less than Six Months Tuesday: DAC: The View from Wall Street Wednesday: Assessing Bias in Computer Vision Systems Thursday: W...
- 22 Jun 2019
Breakfast Bytes: Why Is 5G Such a Big Deal?

Paul McLellan

Yesterday was my post What Is 5G? which is the first half of my introductory look at what 5G really is, based on Ian Dennison's DAC presentation 5G Intelligent System Design. Today we pick up where that post left off. As a reminder, a 5G ne...
- 21 Jun 2019
System, PCB, & Package Design : IC Packagers: Constructing Components from Manufacturing Data

Tyler

We’ve all been there. The only (or most accurate) data that we have for a component is the manufacturing data from another process. It could be a GDSII file for the top-layer metal of an IC or a Gerber film for the BGA ball pattern. If all you ...
- 20 Jun 2019
System, PCB, & Package Design : BoardSurfers - Aerials and Bails: How to Split a Viastack

Monika

Today’s compact and powerful devices require small and high-density PCBs. Tight routing around densely packed components is thus indispensable, but cannot be achieved using conventional blind-buried and through-hole vias. Consequently, stacked vias have become an essential element of contemporary PCB designs. Stacked vias can be used in place of through-hole vias by placing multiple vias exactly over each other, taking…
- 20 Jun 2019
Breakfast Bytes: What Is 5G?

Paul McLellan

At the DAC theater, Cadence's Ian Dennison talked about 5G Intelligent System Design. He repeated his presentation internally at Cadence a couple of days later. Plus, I sat next to him at both CDNLive EMEA and DAC, while I signed books and he tal...
- 20 Jun 2019
Verification: Master of ‘e’? Now You Can Prove It!

teamspecman

The knowledge and experience of using Specman/e tells everyone that you have acquired profound verification methodology. But how do you showcase this knowledge to your company, colleagues, and perspective employers? To help you showcase your expertise, Cadence Training Services now offers Cadence Digital Badging.

A certification test was created for some technologies (including Specman). When you pass the certification…
- 19 Jun 2019
Digital Design: Exploring AI / Machine Learning Implementations with Stratus HLS

SeanDart

A lot of AI design is done in software and, while much of it will remain there, increasing numbers of designs are finding their way into hardware. There are multiple reasons for this including the important goals of achieving lower power or higher performance for critical parts of the AI process. Imagine you need dramatically improved rate of object recognition in automated-driving applications.

Implementing an AI application…
- 19 Jun 2019
Breakfast Bytes: Assessing Bias in Computer Vision Systems

Paul McLellan

I came across a fascinating document from Facebook on methods to assess bias in computer vision systems. At F8 2019 (their user conference), they highlighted some of the things that they are doing to address labeling bias, algorithmic bias, and more....
- 19 Jun 2019
Whiteboard Wednesdays: Whiteboard Wednesdays - Passport Partners Program Expands Customer Cloud Deployment Options

References4U

In this week's Whiteboard Wednesdays video, Craig Johnson explains the purpose of the Cloud Passport Partners Program and how customers can now connect with authorized and knowledgeable service providers to tackle complex cloud deployment projects.www.youtube.com/watch
- 18 Jun 2019
Breakfast Bytes: DAC: The View from Wall Street

Paul McLellan

Jay Vleeschhouwer did his annual...well, he did it last year, too...View from Wall Street in the DAC Pavilion. I've known Jay for years since I spent a couple of years being the person in Cadence who was house-trained on what I could and could no...
- 18 Jun 2019

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