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Latest Blog Posts

  • Breakfast Bytes: 3G and 4G: The Internet Arrives

    Paul McLellan
    Paul McLellan
    In posts over the last couple of weeks, I covered 1G and 2G mobile: 1G Mobile: AMPS, TOPS, C-450, Radiocom 2000, and All Those Japanese Ones 2G: Mobile Goes Digital Today it is the turn of 3G, 3.5G, and 4G. I'll omit the angels-on-a-pinhead wa...
    • 14 May 2020
  • Breakfast Bytes: John Park's Webinar on Chiplets

    Paul McLellan
    Paul McLellan
    Recently Cadence's John Park presented a webinar on Design Methodologies for Next-Generation Advanced Multi-Chip(let) Packaging. Gordon Moore, famous for Moore's Law among other things, also predicted that this day would come. Over 50 years ag...
    • 13 May 2020
  • Analog/Custom Design: Virtuoso IC6.1.8 ISR11 and ICADVM18.1 ISR11 Now Available

    Virtuoso Release Team
    Virtuoso Release Team
    The IC6.1.8 ISR11 and ICADVM18.1 ISR11 production releases are now available for download.
    • 13 May 2020
  • System, PCB, & Package Design : New PCIe SI Challenges Conquered Using Clarity 3D Field Solver for PCB

    Sigrity
    Sigrity
    Figure 1: High-performance PCIe-based graphics card There is a trend in the data center industry moving toward heterogeneous computing in order to satisfy workloads that are computationally intensive. These trends are driving the development of soft...
    • 12 May 2020
  • System, PCB, & Package Design : IC Packagers: The Choice Between Static and Dynamic Shapes

    Tyler
    Tyler
    That title might be a touch misleading. We’re not here to talk about why to convert shapes between static and dynamic. Rather, I want to talk about why you should NOT be doing this. Every design has some conductor shapes in it (or at least a ve...
    • 12 May 2020
  • Breakfast Bytes: Happy Birthday Florence Nightingale: Nurse, Statistician, Feminist

    Paul McLellan
    Paul McLellan
    Today is the 200th anniversary of the birth of the first woman member of the Royal Statistical Society (in London, the title is unqualified since there were no other statistical societies). I've written a bit about her before in my post The Lady...
    • 12 May 2020
  • System, PCB, & Package Design : Challenges of On-Chip Thermal Analysis in Electronic System Designs

    CTKao
    CTKao
    In the beginning of our universe, enormous amount of heat or energy was generated and released during the period of 0 to 10-43 sec, in theory while backed up by models and measurements, about 13.8 billion years ago.  Since then, a variety of phy...
    • 11 May 2020
  • Analog/Custom Design: Virtuoso Meets Maxwell: Help with Electromagnetic Analysis - Part VI

    Kabir
    Kabir
    This is the last blog in the miniseries that aims at providing in-depth details of electromagnetic analysis in Virtuoso RF Solution. To learn about a few tips and tricks on the simulation setup, read more...
    • 11 May 2020
  • Breakfast Bytes: Why Create an SoC?

    Paul McLellan
    Paul McLellan
    I've been in the semiconductor and EDA industries for nearly forty years. One thing I've noticed that hasn't changed is that we love our chips and the tools to design them. Designing a chip that is a perfect match to a unique purpose is ...
    • 11 May 2020
  • Breakfast Bytes: Sunday Brunch Video for 10th May 2020

    Paul McLellan
    Paul McLellan
    https://youtu.be/feK4sISKChA Made on Communication Hill, San Jose (camera Carey Guo) Monday: Signoff in the Cloud Tuesday: Wally Rhines: Predicting Semiconductor Business Trends After Moore's Law Wednesday: Computational Software: A New...
    • 10 May 2020
  • System, PCB, & Package Design : BoardSurfers: Training Insights: Placing Parts Manually Using Design for Assembly (DFA) Rules

    Shreyansh
    Shreyansh
    So, what if you can figure out all that can go wrong when your product is being assembled early on? Not guess but know and correct at an early stage – not wait for the fabricator or manufacturer to send you a long report of what needs to change. That’s why Design for Assembly (DFA) rules
    • 8 May 2020
  • Breakfast Bytes: Hearables and Earbuds

    Paul McLellan
    Paul McLellan
    Do you have a set of Bluetooth earbuds yet? If not, you will. The iPhone was the first to kill the ubiquitous 3.5mm headphone jack, but many other manufacturers have quietly followed. Of course, various wired adapters are available, but the replacem...
    • 8 May 2020
  • Creative Ideas at Work Can Play a Big Part in Difficult Times

    Life at Cadence: Creative Ideas at Work Can Play a Big Part in Difficult Times

    Neil Zaman
    Neil Zaman
    In the blink of an eye, we entered into a new, virtual reality, and the rapidly shifting landscape is testing us in ways we never could have imagined. Our employees are stepping up and showing their best attributes. They’ve been sharply focused...
    • 7 May 2020
  • Breakfast Bytes: 2G: Mobile Goes Digital

    Paul McLellan
    Paul McLellan
    In last week's post, 1G Mobile: AMPS, TOPS, C-450, Radiocom 2000, and All Those Japanese Ones. I covered 1G mobile, the first analog standards. Then we went digital. 2G The Nordic countries started work on an all-digital standard to replace NMT...
    • 7 May 2020
  • System, PCB, & Package Design : IC Packagers: Advanced In-Design Symbol Editing

    Tyler
    Tyler
    We have talked about aspects of the in-design symbol edit application mode in the past. This is the environment specific to the Allegro Package Designer layout tools allowing you to work on symbol definitions directly in the context of your layout de...
    • 6 May 2020
  • Breakfast Bytes: Computational Software: A New Paradigm for EDA Tools

    Paul McLellan
    Paul McLellan
    Cadence has a new white paper out on Computational Software. I've written on these topics in Breakfast Bytes, most recently in the posts: Computational Software System Analysis: Computational Software at Scale To set the scene, here is the a...
    • 6 May 2020
  • Breakfast Bytes: Wally Rhines: Predicting Semiconductor Business Trends After Moore's Law

    Paul McLellan
    Paul McLellan
    I recently attended a webinar presented by Wally Rhines about his new book, Predicting Semiconductor Business Trends After Moore's Law. Wally was the CEO of Mentor, as you probably know. Now he has the title of CEO Emeritus, something I've n...
    • 5 May 2020
  • Breakfast Bytes: Signoff in the Cloud

    Paul McLellan
    Paul McLellan
    Here's a nightmare. You sign off your design with the usual margins. It is a 7nm chip that is meant to run at 3GHz. But it only runs at 2.7GHz. You get Cadence to help you work out what is going on. It turns out that it is due to a critical path...
    • 4 May 2020
  • Breakfast Bytes: Sunday Brunch Video for 3rd May 2020

    Paul McLellan
    Paul McLellan
    www.youtube.com/watch Made on my balcony (camera Carey Guo) Monday: EDA101 Video Tuesday: Weekend Update Wednesday: RAMAC Park and the Origin of the Disk Drive Thursday: 1G Mobile: AMPS, TOPS, C-450, Radiocom 2000, and All Those Japane...
    • 3 May 2020
  • System, PCB, & Package Design : 2019 HF1 Release for Clarity, Celsius, and Sigrity Tools Now Available

    SigrityReleaseTeam
    SigrityReleaseTeam
    The 2019 HF1 production release for Clarity, Celsius, and Sigrity Tools is now available for download at Cadence Downloads. SIGRITY2019 HF1 For information about supported platforms, compatibility with other Cadence tools, and details of key issu...
    • 1 May 2020
  • Breakfast Bytes: Linley Processor Conference 2020 Keynote

    Paul McLellan
    Paul McLellan
    The Linley Processor Conference always opens with a keynote by Linley Gwenapp giving an overview of processors in whatever is the hottest area. Most of the other presentations during the conference tend to be in the hottest area, so it sets a contex...
    • 1 May 2020
  • Analog/Custom Design: Start Your Engines: AMSD Flex – Your Instant Access to Latest Spectre Features!

    Andre Baguenie
    Andre Baguenie
    This blog talks about how to enable the AMS Designer flex mode.
    • 30 Apr 2020
  • Digital Design: Library Characterization Tidbits: Recharacterize What Matters - Save Time!

    AbhaRawat
    AbhaRawat
    Read how the Cadence Liberate Characterization solution effectively enables you to characterize only the failed or new arcs of a standard cell.
    • 30 Apr 2020
  • Analog/Custom Design: Virtuosity: Can You Build Lego Masterpieces with All Blocks of One Size?

    KomalJohar
    KomalJohar
    The way you need blocks of different sizes and styles to build great Lego masterpieces, a complex WSP-based design requires stitching together routing regions with multiple patterns that follow different WSSPDef periods. Let's see how you can achieve this.
    • 30 Apr 2020
  • Verification: Specman’s Callback Coverage API

    teamspecman
    teamspecman

    Our customers’ tests have become more complex, longer, and consume more resources than before. This increases the need to optimize the regression while not compromising on coverage.

    Some advanced customers of Specman use Machine Learning based solutions to optimize the regressions while some use simpler solutions. Based on a request of an advanced customer, we added a new Coverage API in Specman 19.09 called Co…

    • 30 Apr 2020
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