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SoC and IP: ProMOS in Taiwan brings up Elpida 63nm process, successfully builds 1-Gbit DDR3 SDRAMs

archive

Taiwan DRAM maker ProMOS has just announced successful fabrication of 1-Gbit DDR3 SDRAMs using Elpida’s 63nm (a 65nm shrink) fabrication process, transferred to ProMOS under a strategic partnership between the two companies that was initiated at the end of 2009. The 63nm process is up and running at ProMOS’ Taichung fab and the first trial lot of devices meets parametrics, signifying successful transfer of the 63nm process…
- 21 Jun 2010
Verification: DAC Cabbie Taught Me All I Need to Know About Verification

Adam Sherer

Confidence from competence. Measurement through metrics. Sell without selling. These are the pearls I learned from my cab driver on the way home from DAC. Aside from the core truths they convey, they clearly define the top three verification items I saw at 47th DAC in Anaheim this year.
Topping my list is the surging interest in OVM as it matriculates into the Accellera UVM. The OVM/UVM booth at DAC picked up nearly 800…
- 21 Jun 2010
SoC and IP: Samsung’s 512 Gbyte SSD pushes SATA 3 Gbps to the limit with “30nm class” Toggle NAND Flash chips

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Samsung just announced that it will be in volume production with a high-speed, 512 Gbyte SSD next month. The company rates the drive’s sequential read and write performance at 250 Gbytes/sec and 220 Gbytes/sec respectively. According to Samsung, these performance numbers come from a combination of 32-Gbit toggle-mode NAND Flash chips (produced in a “30nm class” process announced at the end of 2009) and Samsung’s Flash…
- 18 Jun 2010
Verification: What's The Best Way To Reduce SoC Development Costs?

jasona

Before I got started with my DAC 2010 customer meetings on Monday morning, I stopped by the DAC Pavilion to hear what Gary Smith had to say in his "Trends and What's Hot at DAC" session. I was very pleased to hear Gary say that Virtual ...
- 16 Jun 2010
Verification: Hit The Road - DAC!

tomacadence

OK, now that the Design Automation Conference (DAC) seems to be rotating among San Francisco, San Diego, and Anaheim, there's not too much "hitting the road" for us Silicon Valley denizens. We either drive an hour north to SF or fly an hour south to SoCal. This year DAC is in Anaheim, where I've just arrived and attended a very nice opening reception.
I'll admit that I had grown a bit tired of going to…
- 13 Jun 2010
Verification: Snapshots From Day 0 of DAC 2010

jvh3

Below are some snapshots of some "day 0" events, and last minute DAC preparations.
Evidence of growing SystemC tide: it was an amazingly beautiful Sunday here in Anaheim -- perfect beach weather. However, ~50 creators & integrators were hunkered down taking notes at the NASCUG meeting.

Graphics being mounted to the Cadence booth. (Suffice to say, our booth looks really sharp this year -- I'll wait until tomorrow…
- 13 Jun 2010
Verification: Advanced Option Brings New Features to Specman/e Users

teamspecman
Great news for Specmaniacs -- a new Specman Advanced Option is being announced at the Design Automation Conference (DAC) for Specman/e users. Three key functionalities in this Option will be:
Multi-core Compilation - Close to Nx (N= # cores) speedup in compilation time.
Re-Seed/Dynamic Load - Allow users to run a simulation and/or regression run until some pivot point, save the state, and start the test from this point…
- 11 Jun 2010
SoC and IP: MemCon 2010 registration closing in on 400 attendees. Theme is "Roadmap: GHz DDR3 and Beyond"

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We’re still more than a month away from MemCon 2010 in Santa Clara (July 28) and the registration is closing in on 400 attendees. We expect many more than that to register and, unfortunately, the rooms have a finite size so there’s a limit to the number of registrations we can accept because there’s a limit to the number of seats we can put into the room. If you’re on the fence, still deciding, shouldn’t you just go ahead…
- 11 Jun 2010
Verification: A New Toy for UVM Geeks

Team MDV

Wasn't it great when you were a kid at Christmas, and you got all those new toys to play with? You could keep yourself entertained for weeks, and with a really good toy, maybe the whole year. As we get older, our taste in toys changes, but the effect is still the same. My latest toy is my motorcycle; I never thought I could have so much fun with just one thing. But when my day job is done, its all I think about.…
- 11 Jun 2010
SoC and IP: Questions for the DAC Pavilion Panel on multicore design

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As I wrote yesterday, I’ll be chairing a Multicore panel at DAC in Anaheim on Monday in the Panel Pavilion at DAC. This morning, I worked on creating some questions for the panelists with my good friend Markus Levy, President of the Multicore Association, who was the original person scheduled to be the moderator.

Here are the questions so far:

1. What comes first with multicore, the hardware or the software?

…
- 11 Jun 2010
Verification: Cadence Contributes ESL Methodology To TSMC Reference Flow 11

Steve Brown

The EDA360 industry vision document shows how growing complexity and application-driven development are requiring orders-of-magnitude improvements in design productivity. With its new Reference Flow 11, TSMC has taken an important step towards a stan...
- 11 Jun 2010
SoC and IP: Don’t miss the multicore Pavilion panel discussion at DAC on Monday, June 14

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I’ll be moderating the Pavilion panel titled “The Multiplier Effect: Developing Multi-Core, Multi-OS Applications” at DAC on Monday at 10:30 am. It’s no secret that ICs with multiple processor cores are now the norm rather than the exception. Yet there’s a real ad hoc feel to assembling these multicore designs. Is there a better way to develop these complex designs? Oh, yes. These multicore designs use memory like nobody…
- 10 Jun 2010
SoC and IP: Denali to demo new PureSpec 2.0 verification-management technology at DAC 2010

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This news is a bit far afield for Denali’s Memory Blog, but many of our blog readers are deeply involved in verification. Next week at DAC in Booth 1183, Denali will be demonstrating a huge leap forward in verification-management technology with early previews of its PureSpec 2.0 tool. Because of its leading presence in verification IP (VIP), Denali is actively involved in verification flows. Working with customers on…
- 10 Jun 2010
SoC and IP: Making SSDs, the TweakTown video: See how A-DATA makes SSDs based on SandForce SF-1222

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TweakTown’s crew visited A-DATA’s manufacturing floor during Computex in Taiwan and shot video of A-Data’s entire manufacturing and test process. If you haven’t seen how SSDs are manufactured, this video will give you a pretty good idea of how it’s done, what kind of machines you use, and how much manual labor a vendor like A-DATA puts into its SSDs. If you are already familiar with the SSD manufacturing process, I’d…
- 10 Jun 2010
SoC and IP: ST Microelectronics’ SPEAr1300 Embedded Processor family employs Denali Databahn DDR controller and PHY to control multiple DDR SDRAM generations

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Last month, this blog described the new SPEAr1300 Embedded Processor family from ST Microelectronics and focused on that chip family’s ability to control either DDR2 or DDR3 memory. Designing the ability to control multiple DDR SDRAM generations into an SOC like the SPEAr1300 is a good idea because it gives the system designers using the SOC maximum flexibility in selecting a memory technology that best fits the end product…
- 9 Jun 2010
Verification: Accelerating Metric-Driven Verification With “Hotswap” on Verification Computing Platform

rmathur

For a while now, Cadence has been providing leading verification solutions and methodologies such as metric driven verification (MDV). MDV guides verification projects from initial planning to verification closure. Engineers need automated verific...
- 9 Jun 2010
Analog/Custom Design: ARM And Cadence Get To The “Core” Of Mixed-Signal Design

nizic

An increasing number of analog and mixed-signal designs in automotive, power management, wireless, medical, and industrial applications require digital control. But designing a state machine, and integrating the increasing amount of logic gates that implements it, has been challenging for analog designers. They often start implementing some digital functionality using a custom methodology, but soon the growing gate count…
- 8 Jun 2010
Verification: Specman, e, and EDA360

teamspecman

The EDA industry is all abuzz over the new vision paper "EDA360 - The Way Forward for Electronic Design"; and for good reason - in 2010 the electronics world is finally starting to transform in ways that have been long anticipated by Specmaniacs and our "Trailblazer" program partners. Specifically, quoting this document:
"EDA360 helps close the profitability gap [i.e. the difference between what you…
- 8 Jun 2010
SoC and IP: MemCon 2010 agenda posted. Your only problem: Which free track do you need to attend?

archive

We’ve just posted the agenda for MemCon 2010. If you touch semiconductor memory in any way--use it, make it, sell it, or just dream about it--you need to come to this 1-day conference. This is the only place in the world where you can spend just one day and find out all you need to know about semiconductor memory technology and the memory markets for the coming year. This year’s focus is on DRAM, but that’s not all you…
- 8 Jun 2010
SoC and IP: Apple controls 20% of NAND Flash market with iPhone and iPad says DRAMeXchange

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With Apple fervor pheromones still heavy in the air from yesterday’s introduction of the iPhone 4G at the Apple Worldwide Developers Conference in San Francisco’s Moscone West convention center, DRAMeXchange sent out emails estimating that Apple currently controls approximately 20% of the NAND Flash market between its iPhone and iPad product lines. The email went on to estimate first-half 2010 iPad shipments at 1.7M units…
- 8 Jun 2010
Verification: India Takes The Lead By Hosting The First Two “ClubTs” in 2010

teamspecman

Specman/e users in India were very excited to see the first two ClubT events hosted in Noida and Bengaluru, India on May 10^th and May 13^th respectively. Overall, there were nearly 125 Specman/e users who attended these two "highly interactive and technology rich" ClubTs.
Customers like TI, Samsung and others presented technical articles on how they've used Specman/e in their advanced verification environments…
- 8 Jun 2010
Verification: System Development – What To See At DAC 2010

Ran Avinun

The EDA360 vision paper specifies key System Realization challenges. Embedded software development and verification are rapidly becoming the key increasing cost factors for the electronics industry. Integration and re-use are becoming critical for th...
- 7 Jun 2010
SoC and IP: INDILINX reveals use of its Barefoot SSD controller in HLDS’ HyDrive optical/solid-state hybrid drive

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This blog has twice written up the newly announced HyDrive optical/solid-state hybrid drive from Hitachi-LG Data Storage (HLDS), which was formally announced last week at Computex in Taiwan. (See “More details on and system-design implications of the Hitachi-LG Data Storage HyDrive Optical/Solid-State Disk” and “How does a hybrid SSD/optical drive make sense?”) The HyDrive combines a Blu-ray/DVD burner optical disc with…
- 7 Jun 2010
SoC and IP: Denali’s never-ending list of parties expands to Flash Memory Summit: August 18

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Seems like the list of Denali parties for Summer 2010 never ends. Denali is heavily participating in the upcoming Flash Memory Summit held in August in Silicon Valley and the company is sponsoring a big offsite party on August 18 at The Loft Bar & Bistro in downtown San Jose (90 S. 2nd Street). It’s free, but you have to register for a ticket ahead of time. https://www.denali.com/en/events/register/denali_party.jsp…
- 7 Jun 2010
SoC and IP: Verification tips and GLOBALFOUNDRIES low-power process to be discussed in Denali’s free DAC Presentations

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Going to DAC? Interested in making your verification processes more effective? Interested in GLOBALFOUNDRIES’ new 65 LPe low-power IC fabrication process? You can attend free presentations on both of these topics at Denali’s DAC booth #1183. Here’s the schedule:

“How to Improve Validation Effectiveness & Efficiency with Customizable Transaction Logs & Protocol Checkers” Speaker: Ravi Kalyanaraman, Marvell…
- 7 Jun 2010

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