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Have you checked out the new VSR Preset feature and the related forms in the IC6.1.7 and ICADV12.3 releases? We all have heard how automatic routing has significantly reduced the turnaround time for layout designers. VSR Preset is a bonus from Cadence to further reduce the time required. It is a "Jewel in the Crown" of Automatic Routing.

A VSR preset is a simple and user-friendly mechanism…

Today is the 120th anniversary of the discovery of the electron by J.J. Thomson in 1897, for which he received the Nobel prize in 1906. The results were published in Philosophical Magazine 44 (269): pages 293–316. I don't know the precise date of publication...

The Computer History Museum (CHM) is on Shoreline Boulevard in Mountain View in one of the buildings that used to make up the SGI campus back when they were the major force in graphics. Most of the rest of the buildings are now part of the Googleplex...

Cadence introduced its new set of Virtuoso® ADE products, which includes Virtuoso ADE Explorer, Virtuoso ADE Assembler, Virtuoso Variation Option, and Virtuoso ADE Verifier, in the IC6.1.7 and ICADV12.3 releases. It’s really exciting to mention that this next-generation ADE product suite has been well-received by customers all across the globe. This product suite also won the prestigious Product of the Year award…

You hear a lot of talk about autonomous cars, but I've also heard many times that autonomous trucks may well be first. If it costs a fixed amount to make a vehicle autonomous, then it is much easier to absorb that cost into a $150,000 truck than a $20...

Professor Markus Lienkamp, of Technische Universität München (roughly the MIT of Germany) was the only academic who presented at the Automotiv Elektronik Kongress in Ludwigsburg. His presentation was The Status of Electromobility in 2017, or How...

In this week's Whiteboard Wednesdays video, Asila Nahas describes the USB Type-C VIP and goes over the multiple designs the VIP can be used to verify.

https://youtu.be/nuNZIrnchc0

Do you have an iPhone? Did it suddenly update IoS at the end of last week? That's because of a vulnerability discovered by a researcher, Nitay Arenstein, in the Broadcom Wi-Fi chip. Since lots of phones, not just iPhone, use this same chip, the vulnerability...

https://youtu.be/uIodpPVnsXM

Coming from Cadence cafeteria patio (camera Sean)

Monday: Discovery of the Electron

Tuesday: Battery Derangement Syndrome

Wednesday: Moving Logic to the 3rd Dimension

Thursday: I Know What the SDI in Samsung SDI Stands...

Yes, it’s Tensilica’s birthday! Twenty years ago today, on July 31, 1997, Tensilica was officially incorporated by Chris Rowen, who I knew from our Synopsys days when he was VP of the Design Reuse Business Unit.  I started working with Tensilica (as a PR consultant) when there were eight people in the office next to the Duke of Edinburgh pub on Wolfe road in Cupertino. I became a Tensilica employee in 2002…

You probably know that Harry Potter's birthday is July 31st. As it happens, that was the same day that Tensilica was founded. Furthermore, both started 20 years ago. The first Harry Potter book was actually published first, on June 26th 1997. On July...

We have been busy working on several small UI enhancements for Assembler & Explorer that will have a big impact! In this blog, I will give you an overview of the enhancements we have made to the Results tab, Corners Setup form, and the Data View and Setup assistants.

Ever wished you could see the test name in the Detail Transpose view? Well, if you are using lC6.1.7 ISR10 or a…

All chips need to cold reset on every power-up. Warm resets, however, are a bit more complicated. Take a smartphone screen, for example. The screen may power down while the phone is idle. However, the user will want it to return to their pre-set brightness level on power-up. Chips have to be tested for multiple warm-reset scenarios, and each of these tests take a very long time.

Enter Xcelium Simulator, and X-propagation…

During the summer, while the living is easy and the fish are jumping, each Friday I'll take a look at computer museum or some artifacts there. Starting this week with the one in Cadence San Jose's backyard just along Montague Expressway: The Intel Museum...

Ready to take the next step in simulation technology with a true third-generation engine, with multi-core technology? ­ Cadence® Xcelium™ Simulator allows you to have unprecedented control over your tests including to further tailor test sequencing to your specific hardware needs.

Get started immediately with the new release Xcelium 17.04 by using the central page on https://support.cadence.com to learn…

Yesterday, I wrote about automotive security from a big-picture level. Today let's drop down and look at some implementation approaches from the chip level. This comes from Thomas Kallstenious, who is imec's program director for security. At the imec...

On July 17, 2017, Cadence announced that the Cadence® Functional Safety Verification Solution had been adopted by ROHM CO., Ltd as part of its deisgn flow for ISO 26262-compliant ICs and LSIs for the automotive market. Cadence fault simulation tech can quickly and easily deal with the complexities around many types of faults, including single event transient (SET), stuck-at-0 or 1, dual-point faults, and more. It also…

Interested in an easy-to-use, collaborative, and robust design-environment that reduces design cycle? Use, Cadence® Allegro® and OrCAD® release 17.2-2016.  Here are the 10 Top Reasons to Move Up to Allegro 17.2-2016 Release  This enables you to accelerate your PCB design cycle. 

Get started immediately with the new release using the central page on https://support.cadence.com. It lists important links to Allegro…

Ofer Ben Noon, CEO and co-founder of Argus Cybersecurity, had the job of raining on the parade at the Automotiv Elektronik Kongress in Ludwigsburg recently. On the day he was speaking, Europe was under attack, Ukraine was largely shut down, big-name shipping...

In this week’s Whiteboard Wednesdays video, Marc Greenberg describes the post-package repair capability introduced in the LPDDR4 specification which is expected to increase in importance for future LP/DDR5 memories.

https://youtu.be/kIpQXWTGnHA

Undoubtedly, the most important component of any online portal is CONTENT and its Ease of Accessibility. In the digital world, content is a mix of text, graphic, video, and so on. This blog covers different types of collateral available on Cadence Support...

As NVIDIA's Jensen Huang pointed out a few weeks ago, and I covered in my blog post yesterday NVIDIA's Jensen Huang on Accelerating the Race to Autonomous Cars, processors are not getting any faster. Instruction-level parallelism is all tapped...

https://youtu.be/9bkl9KLReDI

Coming from hyperspace (camera Sean, editing me)

Monday: Moving Logic into the 3rd Dimension

Tuesday: An Academic View on How Tesla Will Not Win

Wednesday: Samsung SDI on Batteries

Thursday: O Lord Won't You Buy Me a Mercedes...

At Hewlett-Packard Enterprise (HPE), the team working to create IP for “The Machine,” HPE’s vision for the future of computing, recently decided to make the switch to the Xcelium Simulator from their old mix of simulators. To gauge how much Xcelium would help improve their productivity, engineers at HPE devised a series of trials. Each trial applied a specific set of circumstances to check how Xcelium would perform in…