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Latest Blog Posts

  • How to Address the Changing Cooling Needs of Data Centers

    Data Center: How to Address the Changing Cooling Needs of Data Centers

    Veena Parthan
    Veena Parthan
    This blog is an excerpt from the CadenceLIVE Silicon Valley presentation “Using Digital Twins to Optimize the Implementation of AI Compute Clusters” by Steve Blackwell, VP of Engineering at Vertiv Corporation. Steve is recognized as a sea...
    • 16 Oct 2024
  • Modern Thermal Analysis Overcomes Complex Design Issues

    System, PCB, & Package Design : Modern Thermal Analysis Overcomes Complex Design Issues

    MSATeam
    MSATeam

     Thermal gradient of a cell phone using Celsius Thermal Solver

    Melika Roshandell, Cadence product marketing director for the Celsius Thermal Solver, recently published an article in Designing Electronics discussing how the use of modern thermal analysis techniques can help engineers meet the challenges of today’s complex electronic designs, which require ever more functionality and performance to meet consumer demand.

    Today’s modern electronic designs require ever more functionality…

    • 15 Oct 2024
  • Embracing Heritage and Innovation: Reflecting on Cadence's Latinx Mercado Fiesta

    Life at Cadence: Embracing Heritage and Innovation: Reflecting on Cadence's Latinx Mercado Fiesta

    Yesenia Carrillo
    Yesenia Carrillo
    This post was contributed by Giselle Villa, financial analyst at Cadence. As a member of Cadencia, the Latinx Inclusion group at Cadence, I found the Latinx Mercado Fiesta to be a meaningful and enriching experience, especially working in a tech comp...
    • 15 Oct 2024
  • Driving Innovation: Cadence's Cutting-Edge IP on TSMC's N3 Node

    SoC and IP: Driving Innovation: Cadence's Cutting-Edge IP on TSMC's N3 Node

    Frank Ferro
    Frank Ferro

    Staying ahead of the curve is essential to meeting customer needs. Cadence has consistently demonstrated its commitment to innovation, and its latest IP portfolio available on TSMC's 3nm (N3) process is no exception. Today, rapid advancements in AI/ML, hyperscale computing (HPC), and the automotive industry are driving significant changes in technology. Let's explore the impressive array of IP that Cadence offers on this…

    • 14 Oct 2024
  • Verisium Debug App Store

    Verification: Cadence Verisium Debug Introduces Verisium Debug App Store

    Rich Chang
    Rich Chang

    Verisium Debug, the Cadence unified debug platform, offers a variety of debugging capabilities, including RTL debug, UVM testbench debug, UPF debug, and DMS debug. From IP to SoC level debug, the user can take the benefits of the rich debugging features to reduce the time for debug.

    Not only the common and advanced debug features, Verisium Debug also provides Python-based interface API, which enables capabilities allowing…

    • 13 Oct 2024
  • Cadence Commits to Join imec Automotive Chiplet Programme

    Corporate News: Cadence Commits to Join imec Automotive Chiplet Programme

    Corporate
    Corporate
    The automotive industry stands on the cusp of a technological renaissance, ushering in an era where vehicles aren't just tools of transportation but interconnected nodes within a vast network of software-defined mobility. Central to this transformat...
    • 10 Oct 2024
  • Reaching for the Stars: TEACH-NW Students Connect with the ISS

    Corporate News: Reaching for the Stars: TEACH-NW Students Connect with the ISS

    Corporate
    Corporate
    Exploring the vastness of space has always been a captivating endeavor, and for a group of dedicated students at TEACH-NW, it's a dream coming true. These young minds are preparing to establish a live connection with the International Space Station ...
    • 10 Oct 2024
  • release_announcement_blog

    System, PCB, & Package Design : Cadence OrCAD X and Allegro X 24.1 is Now Available

    AllegroReleaseTeam
    AllegroReleaseTeam
    The OrCAD X and Allegro X 24.1 release is now available at Cadence Downloads. This blog post provides links to access the release and describes some major changes and new features.   OrCAD X /Allegro X 24.1 (SPB241) Here is a representative li...
    • 9 Oct 2024
  • system_analysis

    System, PCB, & Package Design : BoardSurfers: Optimizing Designs with PCB Editor-Topology Workbench Flow

    Jasmine
    Jasmine
    When it comes to system integration, PCB designers need to collaborate with the signal analysis or integrity team to run pre-route or post-route analysis and modify constraints, floorplan, or topology based on the results. Allegro PCB Edito...
    • 9 Oct 2024
  • Artificial Intelligence: Accelerating Knowledge in the Digital Age!

    Digital Design: Artificial Intelligence: Accelerating Knowledge in the Digital Age!

    P Saisrinivas
    P Saisrinivas

    In an era of abundant and constantly evolving information, the challenge is not just accessing knowledge but understanding and applying it effectively. AI is a transformative technology that is reshaping how we learn, work, and grow. In this blog, we’ll explore how AI accelerates our knowledge acquisition and understand how it can relate to the process of learning, which connects with our daily lives.

    The role of…

    • 9 Oct 2024
  • The Future of Driving: How Advanced DSP is Shaping Car Infotainment Systems

    SoC and IP: The Future of Driving: How Advanced DSP is Shaping Car Infotainment Systems

    Reela Samuel
    Reela Samuel

    As vehicles transition into interconnected ecosystems, artificial intelligence and advanced technologies become increasingly crucial. Infotainment systems have evolved beyond mere music players to become central hubs for connectivity, entertainment, and navigation. With global demand for comfort, convenience, and safety rising, the automotive infotainment market is experiencing significant growth. Valued at USD14.99 billion…

    • 8 Oct 2024
  • Cadence Integrates NVIDIA NIM Microservices into Its Design Process

    Corporate News: Cadence Integrates NVIDIA NIM Microservices into Its Design Process

    Corporate
    Corporate
    From semiconductors to pharmaceuticals, incorporating tailored AI applications into design has become crucial for accelerating the discovery process. However, using AI requires vast datasets for training, which necessitates safeguarding sensitive inf...
    • 8 Oct 2024
  • Is Liquid Cooling Right for Your Data Center?

    Data Center: Is Liquid Cooling Right for Your Data Center?

    MarkSeymour
    MarkSeymour
    We live in an exciting time—liquid cooling, which once seemed more trouble than it’s worth, is fast becoming an accepted and sought-after technology in the data center industry. That said, it’s still a complex technology to impleme...
    • 8 Oct 2024
  • Cadence Academic Network

    Academic Network: Bridging the Gap: Cadence and Bristol University Develop Industry-Ready Engineers

    Vinod Khera
    Vinod Khera
    Over the last two decades, telecommunications technology has undergone remarkable transformations: it has lowered societal barriers and bridged geographical distances, culminating in establishing an instantaneously connected global society. Informati...
    • 8 Oct 2024
  • Assumptions and Insights of k-epsilon Low Re Yang-Shih Turbulence Model

    Computational Fluid Dynamics: Assumptions and Insights of k-epsilon Low Re Yang-Shih Turbulence Model

    Gaurav
    Gaurav
    Key Takeaways A new time scale-based k-epsilon (k-ɛ) model for near-wall turbulence is discussed. In this model, is chosen as the turbulent velocity scale. The Kolmogorov time scale bounds the time scale. When this time scale is used to reformulate ...
    • 8 Oct 2024
  • Waveform of the Clock and Data at Receiver Input

    SoC and IP: Advancing Die-to-Die Connectivity: The Next-Generation UCIe IP Subsystem

    MBhatnagar
    MBhatnagar
    Cadence tapes out 32G UCIe interface IP for high speed, highly efficient chiplet designs and demonstrate high data rate performance in TSMC's 3nm technology
    • 7 Oct 2024
  • Using Voltus IC Power Integrity to Overcome 3D-IC Design Challenges

    System, PCB, & Package Design : Using Voltus IC Power Integrity to Overcome 3D-IC Design Challenges

    MSATeam
    MSATeam

     Advanced chiip designPower network design and analysis of 3D-ICs is a major challenge due to the complex nature and large size of the power network. In addition, designers must deal with the complexity of routing power through the interposer, multiple dies, through-silicon vias (TSVs), and through-dielectric vias (TDVs).
    Cadence’s Integrity 3D-IC Platform and Voltus IC Power Integrity Solution provide a fully integrated solution for early…

    • 7 Oct 2024
  • Creating Connections through Career Catalyst

    Life at Cadence: Creating Connections through Career Catalyst

    Dominique Topps
    Dominique Topps
    Early career employees Ankit Narasimhan, Jai Ganesh Iyer, Jhenkar Kallambella Suresh, Sanjukta Sheth, Viraj Ranade, Ishika Bhattacharya, and Kushagra Gupta, hailing from Cadence’s Custom IC & PCB Group (CPG), Silicon Solutions Group (SSG),...
    • 7 Oct 2024
  • First Major Toolbox for MATLAB/Simulink Model Deployment to Tensilica HiFi DSPs

    Corporate News: First Major Toolbox for MATLAB/Simulink Model Deployment to Tensilica HiFi DSPs

    Corporate
    Corporate
    Traditionally, developing software for digital signal processors (DSPs) involves a multi-step process: crafting the algorithm code in a specialized tool, adapting it for a specific domain, and implementing it onto the DSP. Given the growing demand fo...
    • 7 Oct 2024
  • Data center external airflow model

    Data Center: Tradeoffs in Managing Data Center External Airflow

    NaomiM
    NaomiM
    By Matthew Kaufeler, Senior Principal Product Engineer When you build a data center, your data hall design team needs to consider how your server rack layout impacts cooling while maximizing usable space. They must plan where to place cable and pipew...
    • 6 Oct 2024
  • encrypted chip

    Verification: Partial Header Encryption in Integrity and Data Encryption for PCIe

    Kunal Chhabriya
    Kunal Chhabriya
    Cadence PCIe/CXL VIP support for Partial Header Encryption in Integrity and Data Encryption.
    • 6 Oct 2024
  • Accessing Doctype Definitions in the Cadence Learning and Support Portal – pt 2

    Learning and Support: Accessing Doctype Definitions in the Cadence Learning and Support Portal – pt 2

    Sachin Nagpal
    Sachin Nagpal
    Hopefully, our blog Doctype definition and accessing them on Cadence Learning and Support Portal -1 was useful for you, and as promised, we are excited to present some other collaterals within our Cadence Learning and Support Portal (all listed under...
    • 4 Oct 2024
  • Deciphering the Potential of High-Fidelity CFD Simulations Across Industries

    Computational Fluid Dynamics: Deciphering the Potential of High-Fidelity CFD Simulations Across Industries

    Veena Parthan
    Veena Parthan
    The landscape of CFD is undergoing a novel shift with the emergence and application of high-fidelity simulations. These advanced simulations, particularly through large eddy simulations (LES), are setting new benchmarks in precision, accuracy, and efficiency across various industries.
    • 3 Oct 2024
  • CadenceCONNECT: Take the Heat Out of Your AI Data Center

    Data Center: CadenceCONNECT: Take the Heat Out of Your AI Data Center

    NaomiM
    NaomiM
    As we delve deeper into the AI era, data centers have become the backbone of technological progress. These high-density computing hubs, often called “AI factories,” are crucial for sustaining and accelerating advancements across various f...
    • 3 Oct 2024
  • International Women in AI Day: Creating More Opportunities for Women in AI

    Corporate News: International Women in AI Day: Creating More Opportunities for Women in AI

    Corporate
    Corporate
    In the rapidly evolving world of artificial intelligence (AI), diversity is not just a value—it's an imperative. International Women in AI Day, celebrated on October 1, shines a spotlight on the contributions and challenges faced by women ...
    • 1 Oct 2024
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