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Custom IC Design

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  • Discussion

    Labeling Multiple Pin names in layout

    Category: Custom IC Design

    By Malik Summair

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    updated over 3 years ago by Andrew Beckett

    1 replies • 12346 views
  • Discussion

    how to use the random function in schematic?

    Category: Custom IC Design

    By lukelukeamd

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    updated over 3 years ago by FormerMember

    5 replies • 11748 views
  • Discussion

    SpectreRF: Can we force no pss iterations? Or just take the 1st one

    Category: Custom IC Design

    By StephanWeber

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    updated over 3 years ago by FormerMember

    4 replies • 9448 views
  • Discussion

    empty schematic still detect variable

    Category: Custom IC Design

    By sjwprcker

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 8522 views
  • Discussion

    Some infuriating schematic capture "features"

    Category: Custom IC Design

    By kenc184

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    updated over 3 years ago by Frank Wiedmann

    2 replies • 1261 views
  • Discussion

    'while' control flow for large simulation sweep in maestro run plan

    Category: Custom IC Design

    By cdnspg

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    •

    updated over 3 years ago by Marc Heise

    1 replies • 1137 views
  • Discussion

    Numbering of items in Output Setup and Results page

    Category: Custom IC Design

    By sjwprcker

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    •

    updated over 3 years ago by Marc Heise

    1 replies • 8081 views
  • Discussion

    How to check full netlist with LSCS

    Category: Custom IC Design

    By sjwprcker

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    •

    updated over 3 years ago by sjwprcker

    2 replies • 9086 views
  • Discussion

    Set ViVa subwindow size using SKILL

    Category: Custom IC Design

    By Brad RFeng

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    •

    updated over 3 years ago by Andrew Beckett

    4 replies • 9422 views
  • Discussion

    'while' control flow for large simulation sweep in maestro run plan

    Category: Custom IC Design

    By cdnspg

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    •

    updated over 3 years ago by FormerMember

    1 replies • 1119 views
  • Discussion

    Kind of tkdiff on schematics?

    Category: Custom IC Design

    By StephanWeber

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    •

    updated over 3 years ago by FormerMember

    5 replies • 11079 views
  • Discussion

    ERROR (OSSHNL-524) - Nport

    Category: Custom IC Design

    By HnArd

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 2622 views
  • Discussion

    Importing stream files in Virtuoso Custom IC Design Environment IC6.1.7-64b

    Category: Custom IC Design

    By jlas

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    started over 3 years ago

    0 replies • 8438 views
  • Discussion

    calcVal function referring a curve

    Category: Custom IC Design

    By sjwprcker

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    •

    updated over 3 years ago by Andrew Beckett

    3 replies • 9677 views
  • Discussion

    How to get all blocking layers touching a Pcell from inside Pcell code

    Category: Custom IC Design

    By sfiswoo

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    •

    updated over 3 years ago by Andrew Beckett

    1 replies • 8381 views
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