Custom IC Design

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Edit Snap Mode is being set to "anyAngle" on startup - Virtuoso XL 6.1.8-64b.500.21

Category: Custom IC Design

By dietSprunk

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updated over 3 years ago by dietSprunk

2 replies • 2389 views
Discussion

cdsterm info sometimes does not show?

Category: Custom IC Design

By kenc184

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updated over 3 years ago by kenc184

8 replies • 11683 views
Discussion

Problem with EM/IR simulation: port name mismatch between SPF file and schematic netlist

Category: Custom IC Design

By ykhuang

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updated over 3 years ago by ykhuang

2 replies • 4221 views
Discussion

Problem in Global/local Optimization

Category: Custom IC Design

By Mostafa A

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updated over 3 years ago by Mostafa A

2 replies • 2135 views
Discussion

is there any way of extracting terminal charge

Category: Custom IC Design

By Yea Chul

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updated over 3 years ago by Yea Chul

2 replies • 8244 views
Discussion

output setup shows a yellow row

Category: Custom IC Design

By sjwprcker

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updated over 3 years ago by sjwprcker

7 replies • 13427 views
Discussion

3-bit flash ADC design

Category: Custom IC Design

By Lohithpras

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updated over 3 years ago by Andrew Beckett

2 replies • 11826 views
Discussion

switch layer when creating a path in 6.1.8?

Category: Custom IC Design

By fireonthesee88

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updated over 3 years ago by Andrew Beckett

1 replies • 8872 views
Discussion

VerilogA End of File

Category: Custom IC Design

By KhanAmir

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started over 3 years ago

0 replies • 7911 views
Discussion

Empty R reporting in Parasitic Backannotation

Category: Custom IC Design

By delgsy

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updated over 3 years ago by Andrew Beckett

1 replies • 8512 views
Discussion

why schematic and viva trace colors mismatched?

Category: Custom IC Design

By kenc184

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updated over 3 years ago by Andrew Beckett

13 replies • 12978 views
Discussion

SA Register output issue

Category: Custom IC Design

By sounakd01

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started over 3 years ago

0 replies • 7982 views
Discussion

netlist creation issue

Category: Custom IC Design

By sjwprcker

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updated over 3 years ago by Andrew Beckett

3 replies • 9591 views
Discussion

Pegasus LVS: how to enforce agreement of fins-per-finger parameter?

Category: Custom IC Design

By dontpanic

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updated over 3 years ago by Andrew Beckett

2 replies • 9810 views
Discussion

How to create auto pin under the cursor select

Category: Custom IC Design

By TonyTang

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updated over 3 years ago by Adam54

6 replies • 10070 views

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