• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      Charlie
      Charlie 95 Points
    • 2
      Aurel B
      Aurel B 69 Points
    • 3
      AC20250829806
      AC20250829806 60 Points
    • 4
      oldmouldy
      oldmouldy 55 Points
    • 5
      SM202511279440
      SM202511279440 50 Points
  • Leaderboard

    • 1
      steve
      steve 17,729 Points
    • 2
      oldmouldy
      oldmouldy 13,685 Points
    • 3
      eDave
      eDave 10,271 Points
    • 4
      ShawnLogan
      ShawnLogan 9,700 Points
    • 5
      skillUser
      skillUser 7,498 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    Changing from nmos type to nmos_dnw type ALL NMOS transistors of ALL cells in same library with SKILL?

    Category: Custom IC SKILL

    By Jose Macias

    •

    started over 6 years ago

    0 replies • 13407 views
  • Discussion

    SKILL code issue

    Category: Custom IC SKILL

    By ssram

    •

    started over 6 years ago

    0 replies • 13955 views
  • Discussion

    Export Artwork Control Form?

    Category: PCB Design

    By Lock2002

    •

    updated over 6 years ago by Lux4al

    4 replies • 19226 views
  • Discussion

    axlDBAddProp(dbid list("PINS_ALLOWED")) is adding "VIAS_ALLOWED"

    Category: Allegro X Scripting - Skill

    By HJerry

    •

    started over 6 years ago

    0 replies • 757 views
  • Discussion

    Are there any standard PCB Design Rules

    Category: PCB Design

    By MurimGomes

    •

    updated over 6 years ago by CadAce2K

    3 replies • 13848 views
  • Discussion

    custom pcell for symbol/schematic that has variable number of terminals

    Category: Custom IC SKILL

    By MauMarulanda

    •

    updated over 6 years ago by MauMarulanda

    2 replies • 2228 views
  • Discussion

    [OrCAD PCB] Place replicate apply without moving component

    Category: PCB Design

    By Mysil B

    •

    updated over 6 years ago by Mysil B

    2 replies • 14493 views
  • Discussion

    Change Delay Tune Colors

    Category: PCB Design

    By jmsigler

    •

    started over 6 years ago

    0 replies • 12952 views
  • Discussion

    Setting up Orcad CIS with PostgreSQL

    Category: PCB Design

    By GeorgeC

    •

    updated over 6 years ago by UlfK

    2 replies • 14709 views
  • Discussion

    Unreadable background color (rectangle balloon information in Virtuoso windows): How to modify ?

    Category: Custom IC Design

    By isazulkc

    •

    updated over 6 years ago by isazulkc

    2 replies • 15111 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information