• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

×

Welcome to the Community Recognition Program!

The Community Recognition Program is a way for Cadence to recognize community participation. By sharing your real-world expertise and broadening your knowledge, you will earn points and increase your reputation.

We encourage you to give answers as well as seek answers. You’ll both expand your skill set and help others expand theirs, and that expansion will be visible and valuable to the entire community.

So, join in. Start a conversation. Ask a question. Be the reason that a question gets solved. And last but not least, don’t forget to have fun!

learn More

Cadence Community Forums

Connect with Cadence experts and users around the globe to share ideas and best practices

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Take the Website Tour - Watch Now

CDNS Forum Categories

Browse Cadence Community Forums

Show All

OnCloud Platform

AWR Design Environment

Custom IC Design

Custom IC SKILL

PCB Design & IC Packaging (Allegro X)

System Analysis

OrCAD X

Computational Fluid Dynamics

Functional Verification

Digital Implementation

Mixed-Signal Design

Logic Design

Verification IP

RF Design

High-Level Synthesis

Implementation

PCell Designer

Functional Verification Shared Code

Hardware/Software Co-Development, Verification and Integration

RAVEL DRC Programming for IC Packaging and PCB

Community Super User Program

Want to know more? Check out this section!

Participate Now
CDNS Feature Content

Quick Links

OrCAD X—Freedom to design boldly

Unlock the Future with OrCAD X: PCB Design Simplified

Announcements

News, FAQs, and related info about how to best use the community.

Application Support and Knowledge Portal

Cadence Online Support puts the help you need within easy reach – around the clock, seven days a week

Training

Cadence helps you get the most out of your investment in our technologies through a wide range of education offerings.

Why Join?

  • Ask questions and get answers from Cadence experts
  • Share your expertise and learn from other Cadence users' experiences
  • Participate in technology- and solution-focused discussions
  • Leaderboard

    • 1
      Rita Fung
      Rita Fung 71 Points
    • 2
      Zhifeng Jin
      Zhifeng Jin 60 Points
    • 3
      oAwad
      oAwad 40 Points
    • 4
      LogicNet
      LogicNet 36 Points
    • 5
      excellon1
      excellon1 35 Points
  • Leaderboard

    • 1
      steve
      steve 17,894 Points
    • 2
      oldmouldy
      oldmouldy 13,845 Points
    • 3
      eDave
      eDave 10,386 Points
    • 4
      ShawnLogan
      ShawnLogan 9,725 Points
    • 5
      skillUser
      skillUser 7,518 Points
CDNS - feedback

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

Latest Posts

  • Discussion

    PCB Editor: editing lines

    Category: Allegro X PCB Editor

    By eddoh

    •

    updated over 5 years ago by Hodgepodge

    4 replies • 17308 views
  • Discussion

    Convert from PCB PADS file (.pcb) to Sigrity format (.spd)

    Category: Allegro X APD

    By Binhngo1210

    •

    started over 5 years ago

    0 replies • 14989 views
  • Discussion

    Dynamically display wire color according to net signal type in schematics

    Category: Custom IC SKILL

    By AurelBuche

    •

    updated over 5 years ago by AurelBuche

    2 replies • 13733 views
  • Not Answered

    Bottom Up Hierarchical Design

    Category: Design Entry HDL

    By mmov

    •

    updated over 5 years ago by tmd63

    4 replies • 16067 views
  • Discussion

    ADE Assembler: variable values with leading zeros interpreted as octal in ICADVM20.1

    Category: Custom IC Design

    By dontpanic

    •

    updated over 5 years ago by Andrew Beckett

    6 replies • 15222 views
  • Discussion

    What's the bindkey command for ascend to top level on Cadence?

    Category: Custom IC Design

    By venkmanbuster

    •

    updated over 5 years ago by Andrew Beckett

    6 replies • 8603 views
  • Discussion

    Restrict buffer use for a particular sub block while routing using INNOVUS

    Category: Digital Implementation

    By RohithSivakumar

    •

    updated over 5 years ago by Dimo M

    1 replies • 14188 views
  • Discussion

    Getting drc Error Report

    Category: Allegro X PCB Editor

    By karthikeyan123

    •

    updated over 5 years ago by karthikeyan123

    2 replies • 15080 views
  • Discussion

    create a copy of device library, some parameters' limitCheck failed....

    Category: Custom IC Design

    By ringamp

    •

    updated over 5 years ago by Andrew Beckett

    3 replies • 1674 views
  • Discussion

    How to pass a string variable in the addRings command?

    Category: Digital Implementation

    By vinayelk

    •

    updated over 5 years ago by Dimo M

    1 replies • 13312 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information