Community

CDNLive Boston 2017: Teradyne reveals their success with JasperGold in their presentation, Success using Formal Verification--and now they join the ever-growing fold of JasperGold FPV (Formal Property Verifier) App users.

Teradyne had used some of JasperGold's functionality before with the JasperGold Connectivity App, but this marked a noted change in their usage of it by embracing more of the features the JasperGold…

The keynote for the second day of the Linley Processor Conference was by Chris Rowen. Chris was the founder of Tensilica, and became the CTO of the IP group when Cadence acquired them. A year or so ago, he left Cadence to work in deep learning and founded...

Linley Gewennap always gives the opening keynote for the Linley Microprocessor Conference. This year, he titled it Processor Innovation Supersedes Moore's Law. The basic theme was something that I've talked about before (for example, Are General...

https://youtu.be/CUabZn_-1_M

Coming from a cartoon world (camera Sean)

Monday: Are We There Yet? Metric Driven Signoff

Tuesday: The Empire Long Divided Must Unite

Wednesday: Mark Papermaster: Moore's Law Plus

Thursday: Oski Formal Verification...

At the SEMI Strategic Materials Conference, SMC, Lung Chu, who heads up SEMI China (and worked at Cadence at one point in his career) talked about The Rise of China IC Industry: Challenges and Opportunities. There are a number of amazing facts about the...

In this week's Whiteboard Wednesdays, the first in a three-part series, Scott Jacobson takes a closer look and the market size of the automotive electronics industry and how this industry segment drives new requirements for memory models.

https://youtu.be/-KnickzWfe0

Last week was the Grace Hopper Celebration of Women in Computing (GHC), held in Orlando Florida (it moves around each year). It was created by Telle Whitney and Anita Borg back in 1994. Anita died in 2003 from a brain tumor and Telle runs that conference...

How can you become an expert in your field? Access our short self-help videos called Training Bytes. It’s as easy as 1, 2, 3...

We know time to market is crucial. Our training team is working around the clock to help you become more proficient...

In the late 1960s and early 1970s, there was a TV show called "Get Smart." It was a sort of cross between a James Bond movie, and a Mel Brooks movie, not least because it was created by Mel Brooks. Given that, you won't be surprised to know that the show...

At the recent Decoding Formal Club meeting, organized by Oski and sponsored by Cadence, there was a presentation on computational origami. That sounds like a great marketing name for formal verification, but in fact it was indeed what it sounds like...

At the Cadence VIP dinner at Korea CDNLive last month, Paul Cunningham spoke about the state of the EDA industry, especially in the digital and signoff world.

It all comes down to the productivity gap between the design diversity and complexity rising faster than the design schedules and other limited resources. This is our fundamental challenge.

To overcome those challenges, designers must approach the challenge…

EDPS is the Electronic Design Process Symposium, historically held in Monterey, but this year in Milpitas for the first time. My first post about the symposium is Solving the Design to Manufacturing Problems in Milpitas. That post ended saying that the...

Recently, CDNLive China was held in Shanghai. What are the highlights of PCB Track? What are the latest news in the industry? What are the development strategies for Cadence PCB/Packaging? We conducted an exclusive interview with Mr. Saugat Sen, Cadence Allegro R&D Vice President

Figure 1 Mr. Saugat presented Outstanding Paper Award to Spreadtrum

Figure 2: CDNLive China

Figure 3 In PCB Track. Saugat delivered…

At CDNLive in Taiwan in August, there was a record number of attendees, with about 880 customers and partners. There were almost 40 presentations on six different technical tracks, including a wide variety of user-authored presentations addressing all...

In this week’s Whiteboard Wednesdays, Raul Casas, systems architect IP group, discusses the results of Cadence method for complexity reduction of a convolutional neural network.

https://youtu.be/iN8zwRQMiEo

https://youtu.be/SVVE2vM4L6U

Coming from Alum Rock Park (camera Carey Guo)

Monday: Conformal Smart LEC

Tuesday: Grace Hopper Celebrating Women in Computing

Wednesday: SEMI on China Semiconductor Market

Thursday: Linley Gwennap on the Processor ...

Last week’s blog ended with some of the IOT trends that Somshubhro Pal Choudhury, who was a guest speaker at CDNLive India 2017, spoke about during his talk.

This blog post will look at some of the vertical markets where, according to Som, there...

Tomorrow it is the Linley Microprocessor Conference and Pulin Desai of Cadence is one of the presenters this morning. He will be talking about Scaling Embedded Inference Performance for Deep Learning.

Of course, Deep Learning (DL) is one...

PSS is the Accellera Portable Stimulus Standard. Or I should say proposed standard, since it isn't finalized yet. At CDNLive India, Prabhat Gupta of AMD presented First Encounter with Emerging Portable Stimulus Methodology. Of course, since the standard...

In the past, some of you have expressed the desire to have all the information and content specific to a product at one place. You said it, we did it!

Now, all you need is choose a product of your choice after logging in at https://support.cadence.c...