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Latest Blog Posts

  • Breakfast Bytes: The Fermi Paradox

    Paul McLellan
    Paul McLellan
    It's the day before Thanksgiving. Breakfast Bytes will be dark Thursday and Friday. But today, the day before a break, I write about something that has little (okay, no) connection to semiconductors and EDA. I thought today I'd write about the Fermi ...
    • 21 Nov 2018
  • Breakfast Bytes: Google TPU Software

    Paul McLellan
    Paul McLellan
    In yesterday's post I gave the details of the TPU hardware from Cliff Young's keynote on the second day of the recent Linley Processor Conference. Today, I'll look at what Cliff said about software and co-design, creating both the hardwar...
    • 20 Nov 2018
  • Breakfast Bytes: Inside Google's TPU

    Paul McLellan
    Paul McLellan
    At the Linley Fall Processor Conference recently, the keynote on the second day was by Cliff Young of Google titled Codesign in Google TPUs: Inference, Training, Performance, and Scalability. The TPU is Google's Tensor Processing Unit. It is actually...
    • 19 Nov 2018
  • Breakfast Bytes: Sunday Brunch Video for 18th November 2018

    Paul McLellan
    Paul McLellan
    https://youtu.be/G12sQpq0JSI Made on Maui (camera Carey Guo) Monday: Portable Stimulus and Correct Designs Tuesday: Bagels and Brains: SEMI's Artificial Intelligence Breakfast Wednesday: How to Find Primes Thursday:  Mechanica...
    • 18 Nov 2018
  • PCB、IC封装:设计与仿真分析: 如何一劳永逸轻松对接三维建模专家

    Sigrity
    Sigrity
    回想一下那个坐在角落里被一群博士们簇拥着的同事;人人都想找这位3D专家给自己的设计做3D结构分析。他/她好像无所不能,会使用一般人难以掌握的软件工具。 但是问题是,即使他/她分析完你的3D结构并告诉你需要做出哪些调整之后,你仍然面临着大量的工作。 你可能需要几天才能完全理解他/她想要的改变,继而再需要几天在layout设计工具中重新绘制该结构。再分析、再更新,这样的往复可能会持续好几次,直到最终的设计令大家满意。 我们的Allegro和Sigrity工具可以帮你解决这个问题。 只要你能说服3D...
    • 17 Nov 2018
  • Breakfast Bytes: The Linley Halloween Processor Conference

    Paul McLellan
    Paul McLellan
    Halloween saw the latest Linley Fall Processor Conference. It is only a few years ago that processors were fairly boring. Intel and Arm would regularly come out with new designs, and some specialized processor families like Tensilica would update the...
    • 16 Nov 2018
  • 定制IC芯片设计 : Virtuoso: 新序曲-新视角下的拥塞分析

    Parula
    Parula
    总结: 敬请关注这种独特的布线功能集以及ICADVM 18.1中即将推出的Design Planner工具,并以全新的视角来体验新的拥塞分析辅助工具。
    • 15 Nov 2018
  • Analog/Custom Design: Virtuoso: The Next Overture – Concurrent Layout – a New Methodology for Team Design

    Sucharita
    Sucharita
    Any task when divided among multiple people gets done quickly... right? What if we told you that the new Layout XL ICADVM18.1 release features a concurrent layout methodology that lets multiple designers work on the same cellview at the same time! … interested to know more? Read on…
    • 15 Nov 2018
  • Breakfast Bytes: Mechanical, Thermal, EMI, SI, PI: PCB Design Needs Them All

    Paul McLellan
    Paul McLellan
    Back in the days when Roger Moore was James Bond, there were various criticisms of his acting style (or lack of it): I am so surprised, I shall raise my left eyebrow.I am so amused, I shall raise my right eyebrow.And now...both eyebrows together! P...
    • 15 Nov 2018
  • Breakfast Bytes: How to Find Primes

    Paul McLellan
    Paul McLellan
    Primes are really important in encryption. In fact, the foundation of internet security depends on a couple of things that seem somewhat impossible could both be true at once: It is easy to decide whether a number has factors or not There is no gene...
    • 14 Nov 2018
  • Whiteboard Wednesdays: Tensilica HiFi 5 DSP Enabling Machines for Voice UI

    References4U
    References4U

    In this week’s Whiteboard Wednesday, Sachin Ghanekar, Design Engineering Group director at Cadence, talks about the Cadence® Tensilica® HiFi 5 DSP, and how it works to fill the needs of both front-end processing and neural networks.

    www.youtube.com/watch

    • 13 Nov 2018
  • Breakfast Bytes: Bagels and Brains: SEMI's Artificial Intelligence Breakfast

    Paul McLellan
    Paul McLellan
    A couple of weeks ago the Silicon Valley chapter of SEMI held a breakfast meeting Artificial Intelligence at the Edge. There were 5 presentations: Kevin Krewell of TIRIAS Research: There Is No One-Size-Fits-All in ML at the Edge. Dave Pellerin ...
    • 13 Nov 2018
  • 定制IC芯片设计 : Virtuoso: 新序曲-Design Planner 工具简介

    Rishu Misri Jaggi
    Rishu Misri Jaggi
    新版的Virtuoso平台(*ICADVM18.1)提供了突破性的分析功能和创新的仿真驱动版图设计,实现了更强大,更高效的设计,支持最先进的工艺技术。基于该解决方案,我们能够通过最先进的方法来显著提高生产力,并且提供业内最全面的解决方案,能实现芯片,封装,模块和电路板间相互操作的流程。 如果我们告诉您我们正在研发一款新产品帮助您在顶层,模块层以及单元层更为有效地进行规划,且不像现在这样需要花费您所有的时间才能完成所有的规划。 听起来是不是很不可思议? 也许这确实听起来很不可思议,但是事实上我...
    • 13 Nov 2018
  • Breakfast Bytes: Portable Stimulus and Correct Designs

    Paul McLellan
    Paul McLellan
    The title of this post seems pretty generic, after all who wouldn't want correct designs. But actually Correct Designs is the name of a company. They have been working closely with Cadence on PSS, the Accellera Portable Stimulus Standard, and Perspec...
    • 12 Nov 2018
  • Breakfast Bytes: Sunday Brunch Video for 11th November 2018

    Paul McLellan
    Paul McLellan
    https://youtu.be/deyk_MEkjZg Made at Cadence Diwali Celebration (camera Sean) Monday: China Update Tuesday: Automotive Summit: Driving an Industry with Electronics Wednesday: IEDM Preview: 3nm and More Thursday:  RISC-V Summit Preview:...
    • 11 Nov 2018
  • PCB、IC封装:设计与仿真分析: 针对电气工程师的热管理基础——第一篇

    Sigrity
    Sigrity
    作者:Lawrence Der 在过去,机械工程师全权负责产品的热力设计,包括产品的机械外壳和其它物理方面的设计;然而现在,热力设计问题却是要电气工程师来共同承担。随着嵌入式微控制器、固件和传感器等的出现,电气工程师在产品的热力管理中起到的作用越来越大。而作为电气工程师,您是否体验过设计的产品超过了温度规范,却不知道要如何解决或减轻这个问题。特别是随着产品设计的功率密度越来越高,元器件每单位体积消耗的功率也越来越大,导致我们的产品越来越容易发热。 在针对电气工程师的热管理基础系列文章的第一篇中...
    • 9 Nov 2018
  • Breakfast Bytes: Kaufman Award Dinner: The Tom Williams Story

    Paul McLellan
    Paul McLellan
    Wednesday night it was the annual Kaufman Award Dinner to honor this year's recipient, Tom Williams. To learn more about the history of the award, read my post Who Was Phil Kaufman? I also talked to Tom Wiliams in Italy last month, when the ...
    • 9 Nov 2018
  • Breakfast Bytes: RISC-V Summit Preview: Pascal or Linux?

    Paul McLellan
    Paul McLellan
    Coming up in December, in the same week as IEDM, is the RISC-V Summit at the Santa Clara Convention Center. For a basic introduction to RISC-V see my post RISC-V—Instruction Sets Want to Be Free. It is clear that RISC-V is already bec...
    • 8 Nov 2018
  • Breakfast Bytes: IEDM Preview: 3nm and More

    Paul McLellan
    Paul McLellan
    A lot of aspects of EDA and semiconductor are fairly easy to predict: you read off the process roadmap for the big guys and work out the implications for tools, IP, and methodology. Of course, it is harder back away from the leading edge since t...
    • 7 Nov 2018
  • Whiteboard Wednesdays: Whiteboard Wednesdays - How the Cadence 112G SerDes IP Solves the Challenges of Long-Reach Signaling

    References4U
    References4U

    In this week’s Whiteboard Wednesday, Wendy Wu explains what NRZ and PAM-4 signaling is all about and the sources of channel loss that make high-speed, long-reach SerDes design so challenging.  She then describes the unique architectural advantages of the Cadence® 112G Long-Reach SerDes IP that makes it an ideal choice for high-speed networking and server chip designs.

    https://youtu.be/s_kZBbbf110

    • 6 Nov 2018
  • Breakfast Bytes: Automotive Summit: Driving an Industry with Electronics

    Paul McLellan
    Paul McLellan
    Coming up on November 14th is the Cadence Automotive Summit. This will be held on the Cadence campus (2655 Seely Avenue, San Jose if you need a street adress for your map app). The day starts  with registration and breakfast at 8.30am and wraps ...
    • 6 Nov 2018
  • The India Circuit: A Diwali with Green Crackers and Cooking Bots

    Madhavi Rao
    Madhavi Rao
    It’s Diwali! My favorite festival out of all the many celebrations that we Indians have through the year. But Diwali nowadays is different from even just five years ago. I wrote last year about how there was a ban on lighting firecrackers (an i...
    • 5 Nov 2018
  • Breakfast Bytes: Breakfast Buffet for October 2018

    Paul McLellan
    Paul McLellan
    https://youtu.be/YBlBzB3n504 The three highlighted posts for October were: CDNLive Israel 2018 The World's First Working 7nm 112G Long Reach SerDes Silicon "Alexa, What Is HiFi 5?" Sign up for Sunday Brunch, the weekly Break...
    • 5 Nov 2018
  • Breakfast Bytes: China Update

    Paul McLellan
    Paul McLellan
    Over the last couple of weeks, I came across various little things about China, none of which justified a blog post all on their own, but it seems a good time to give an update on what's going on over there. I consider China to be the biggest story i...
    • 5 Nov 2018
  • Breakfast Bytes: Sunday Brunch Video for 4th November 2018

    Paul McLellan
    Paul McLellan
    https://youtu.be/HCJG-tABZWE Made at Linley Fall Processor Conference (camera Sean) Monday: Formal Signoff with JasperGold Tuesday: Texas Instruments on Automotive Reliability Wednesday: "Alexa, What is HiFi 5?" Thursday: Yoga is Pass&...
    • 4 Nov 2018
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