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Latest Blog Posts

  • Verification: Accelerating the Next Big Shift in Verification

    fschirrmeister
    fschirrmeister
    Today Cadence announced that we are aligning our proposal to the Accellera Portable Stimulus Working Group (PSWG) with the other two commercial vendors in this market – Mentor Graphics and Breker – to deliver a joint contribution, intende...
    • 8 Sep 2015
  • Whiteboard Wednesdays: Whiteboard Wednesdays - Addressing SoundWire Design Challenges

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, the second in a two-part series, Charles Qi continues his discussion on the MIPI SoundWire standard. Charles talks about software design challenges and how customers can leverage Cadence design IP for the SoundWire protocol to effectively address these challenges.

    https://youtu.be/jCz3b6ol1JA

    • 1 Sep 2015
  • System, PCB, & Package Design : What's Good About Allegro PCB Editor Line Width Retention? 16.6 Has It!

    Jerry GenPart
    Jerry GenPart

    Currently, user line width overrides are permitted during the Add Connect command, but are reset back to constraint driven when the command is completed. New behavior in the Allegro PCB Editor 16.6 release maintains the user setting until it is manually reset. The line width override now appears in blue, similar to the model established in the Constraint Manager Worksheets or shape parameter form to represent an override…

    • 1 Sep 2015
  • System, PCB, & Package Design : Integrate PVS into Your IC Package Design Flow to Optimize for Manufacturability with Latest 16.6 ISR of Cadence SiP Layout

    ICPackagingPro
    ICPackagingPro
    As package substrates continue to get more complex, often resembling silicon as much as traditional organic substrate, design rules get tighter, manufacturing concerns become more important, and the simple act of ensuring that high yield, high reliab...
    • 28 Aug 2015
  • SoC and IP: USB Type-C Ecosystem, Issues, and Opportunities

    Steve Brown
    Steve Brown

    USB Type-C is an innovation that is transforming the electronics industry. What is significant about Type-C that demands attention? What should system architects consider for their future projects?

    We sat down with MCCI Corporation’s CEO, Terrill Moore, to hear his thoughts on these questions. MCCI is a leading supplier of USB firmware and software, and actively participates in USB-IF standards activities. They are working…

    • 26 Aug 2015
  • Whiteboard Wednesdays: Whiteboard Wednesdays—The Applications and Benefits of 802.11ad

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, Bob Salem provides a detailed overview of 802.11ad and how users can benefit from this latest wireless technology.

    https://youtu.be/68ejrpHGhyo

    • 25 Aug 2015
  • Digital Design: Five-Minute Tutorial: Innovus Clock Tree Synthesis and Debugger

    Kari
    Kari

    Hi Everyone,

    Last time, our Five-Minute Tutorial focused on the new Innovus Placement Optimization. The next step in the flow would be inserting clock trees. Now that we can take advantage of the CCOpt engine to create clock trees, we can also concurrently optimize for timing. But you still have the choice of whether or not to do so. This is a decision that could be design-dependent, and you may want to try both methods…

    • 21 Aug 2015
  • SoC and IP: Cadence IP for USB Works over Type-C (Proof Inside)

    Jacek Duda
    Jacek Duda

    There is no other specification in the history of USB that caused so much discussion and interest as the USB Type-C. The new type of connector, designed to be a jack of all trades, eliminates all flaws of legacy Type-A and Type-B plugs, and adds significant benefits for USB and beyond. Here's a brief rundown of those benefits for those who are not frequent readers of the Cadence USB blog:

    1. Reversible design: You…
    • 20 Aug 2015
  • Whiteboard Wednesdays: Whiteboard Wednesdays - Evolution of Automotive Electronics

    Christine Young
    Christine Young

    In this week's Whiteboard Wednesdays, Charles Qi talks about the evolution of electronics in the automotive industry and the challenges and opportunities faced by suppliers today.

    https://youtu.be/Ydd1UYy7jjc

    • 18 Aug 2015
  • System, PCB, & Package Design : What's Good About Allegro PCB Editor NC Route? 16.6 has Several New Enhancements!

    Jerry GenPart
    Jerry GenPart

    There are a few NC Route enhancements in the 16.6 Allegro PCB Editor release.

    Read on for more details …

    Separate plated vs. non-plated files

    An option has been added to the NC Route user interface to specify that separate output files are desired for plated versus non-plated routing. When this option is enabled, non-plated routing for both the board and slot holes will continue to be output to a ‘<name>.rou’ file…

    • 18 Aug 2015
  • Whiteboard Wednesdays: Whiteboard Wednesdays—Managed NAND Flash Devices

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, Lou Ternullo provides a detailed overview of managed NAND flash devices and system design considerations.

    https://youtu.be/L47Mcz8JLIw

    • 11 Aug 2015
  • SoC and IP: Electrical Validation of DDR4 Interfaces

    EvanG
    EvanG

    Developing SoCs with high-speed memory interfaces, such as DDR4, presents substantial challenges throughout the design process. Today’s high-performance semiconductor processes enable high-speed design, and require expertise in signal integrity design, timing closure, and system bring-up. One of the biggest challenges is co-designing the memory interface, the chip package, and the PCB to preserve the high-speed signal…

    • 11 Aug 2015
  • SoC and IP: Cadence ONFI 4.0 Flash Memory IP Increases Data Access to 800Mtps and Reduces Power Up to 50%

    Steve Brown
    Steve Brown

    Announcing Availability of ONFI 4.0 IP

    Flash memory applications have expanded from USB Flash Drive “sticks” to solid state drives (SSD) and beyond, as designers demand increased non-volatile storage capacity and performance. Designers are also faced with the challenge to reduce system-level power. To meet these needs Cadence is unveiling its Open NAND Flash Interface (ONFI) 4.0 IP, delivering increased data access rates…

    • 10 Aug 2015
  • System, PCB, & Package Design : Manage Your Shapes with Ease in the Latest 16.6 ISR of Cadence APD and SiP Layout

    ICPackagingPro
    ICPackagingPro
    Shapes. Whether it’s a split plane, a power ring or flag under your die, or a cavity outline, they abound in any IC package substrate. Some are filled, others cross-hatched or even degassed. Whatever they look like in your design, editing them ...
    • 5 Aug 2015
  • System, PCB, & Package Design : What's Good About Allegro PCB Editor DRC by Window? It’s in the 16.6 Release!

    Jerry GenPart
    Jerry GenPart

    The 16.6 Allegro PCB Editor ‘DRC by Window’ command is an alternative to running DRC update at the full design level. As the name suggests, the command is limited to checking the elements within the extents of a user-defined selection window. On large, highly constrained designs where database performance is problematic, one can simply disable ‘On-line’ DRC mode if favor of this ‘On-demand’ method. …

    • 4 Aug 2015
  • Whiteboard Wednesdays: Whiteboard Wednesdays—More on Camera Subsystems

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, the second in a three-part series, Pulin Desai goes into more detail on the function of each individual block within a camera subsystem.

    https://youtu.be/XBE8BV1QaXA
    • 4 Aug 2015
  • Verification: Double-Take: Improving Validation Test Suite with System-Level, Coverage-Driven Verification

    rmathur
    rmathur
    Application Spotlight  When Freescale wanted to measure the coverage of their validation test suite for their automotive products, they determined that that the memory map coverage approach wasn’t adequate. They needed a different way to ...
    • 31 Jul 2015
  • Whiteboard Wednesdays: Whiteboard Wednesdays - LPDDR4 for Automotive Memory

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, Kishore Kasamsetty discusses why LPDDR4 is the right choice for automotive memory designs.

    https://youtu.be/3UqtiOMxZoc
    • 28 Jul 2015
  • System, PCB, & Package Design : What's Good About Allegro PCB Editor Disable of Open Space Routing? 16.6 Has It!

    Jerry GenPart
    Jerry GenPart

    By default, the 16.6 Allegro PCB Editor ‘Add Connect’ command generates routes when a pick is made on database elements like pins or vias, but also when a pick is made in open or black space. Designers who push the mouse fast and hard frequently make false picks and are forced to opt out of the command then refine the pick to a logical element like a pin or rat line. Some designers may embrace the open space pick concept…

    • 22 Jul 2015
  • Verification: Make Your Debugging Faster by Recording Your Simulator

    teamspecman
    teamspecman

    One of the famous quotes of Brian Kernighan is: "Debugging is twice as hard as writing the code in the first place. Therefore, if you write the code as cleverly as possible, you are, by definition, not smart enough to debug it". Well, I am not really sure he meant that no one is smart enough to debug one’s own code; however, he did mean that debugging is hard, if not even harder than coding. Hence, you want to get any…

    • 21 Jul 2015
  • Whiteboard Wednesdays: Whiteboard Wednesdays—Extending a Processor’s Instruction Set

    References4U
    References4U

    In this week’s Whiteboard Wednesdays video, Chris Rowen explains the benefits of extending a processor’s instruction set to achieve higher performance and lower energy.

    https://youtu.be/bzoXDAKinRI

    • 21 Jul 2015
  • SoC and IP: USB Type-C Interoperability Workshop—True, Real-Life Validation

    Steve Brown
    Steve Brown

    There’s no denying that USB Type-C is the fastest adopted specification in the history of USB. Just by looking at the number of companies implementing the specification that was released only 10 months ago, one can see that this is truly the next big thing.

    Despite such a short period after specification approval, there are already some devices and adapters available in the market, and the following months, or…

    • 20 Jul 2015
  • Verification: Use Model Versatility Is Key for Emulation Returns on Investment

    fschirrmeister
    fschirrmeister
    It is always great to see when customers confirm what we in product management put forward as key elements for our product. As my team owns the product management for emulation, DAC 2015 in San Francisco was once again a great opportunity to check in...
    • 20 Jul 2015
  • Digital Design: Hot Summer for the High-Level Synthesis Community

    dpursley
    dpursley
    Summer is usually a slow time of the year due to vacations, beautiful weather, and backyard barbeques. But for the HLS community, this summer has started off hot. At the 2015 Design Automation Conference, there was a lot going on with high-level syn...
    • 14 Jul 2015
  • Whiteboard Wednesdays: Whiteboard Wednesdays—Understanding Camera Subsystems

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, Pulin Desai provides an overview of a camera subsystem used in mobile, automotive, security, and PC applications.

    https://youtu.be/vtC9Sq1xVp8

    • 14 Jul 2015
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