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Latest Blog Posts

  • Verification: The Best C++ Debugger is Not the Best SystemC Debugger

    jasona
    jasona
    I mentioned in a previous article that I have two girls who are excellent debaters. In debate, they learn how to use evidence and logic to prove or disprove points about the specific cases they debate. During recent discussions with SystemC Virtual P...
    • 15 Sep 2010
  • System, PCB, & Package Design : What's Good About Allegro GRE Rake Functionality? You’ll Need the SPB16.3 Release to See!

    Jerry GenPart
    Jerry GenPart

    The SPB16.3 Global Route Environment (GRE) Expanded Rakes functionality provides better visualization of the connectivity of the Bundles. In previous versions, this functionality was only provided when the user moved the gather point. Now this functionality is provided at two levels – the design level through Design Parameters, or at the individual bundle level through the Bundle’s properties.


    For more information…

    • 15 Sep 2010
  • Digital Design: Five-Minute Tutorial: Encounter Command Line Help

    Kari
    Kari

    Hi everyone, and welcome to the first Five-Minute Tutorial! I have several things planned for this series. Today we're going to look at getting help on the command line in the Encounter Digital Implementation (EDI) system.

    Sometimes in the middle of an EDI session, you want to run a command but you can't remember the exact name, or the exact options. Sometimes you don't even know if a command exists to do what you…

    • 15 Sep 2010
  • SoC and IP: What’s the best SSD for less than $150? Techspot publishes budget SSD roundup.

    archive
    archive
    A year ago, Techspot.com tested and reviewed SSDs and the least expensive drive it worked with at the time cost $270. This year, Techspot has limited its testing to SSDs costing $150 or less. What a difference a year has made. These drives aren’t big--in the 32- to 40-Gbyte capacity range. The competitors tested include the 40-Gbyte OCZ Agility 2 ($135), the 40-Gbyte OCZ Vertex 2 ($124), the 64-Gbyte OCZ Onyx ($130)…
    • 14 Sep 2010
  • SoC and IP: SanDisk and NDS collaborate to add features and video on demand to set-top boxes through low-cost SSD

    archive
    archive
    NAND Flash vendor SanDisk and set-top box software vendor NDS Group Ltd are collaborating to bring a low-cost means of converting existing set-top box designs into DVRs (digital video recorders) with features such as live pause and video on demand. The hardware vehicle will be SanDisk’s P4 SSDs, which are available in SATA, PATA, and BGA interfaces and it appears to be the SATA interface that’s involved here. The drives…
    • 14 Sep 2010
  • Verification: All I Really Need to Know About MDV I Learned From Hollywood - Part 3

    tomacadence
    tomacadence

    This is my third and final blog entry in a series using quotes from famous Hollywood movies to highlight the key concepts about metric-driven verification (MDV). As a reminder, here's the four-phase Cadence MDV flow:

    In my first post I dealt with the "plan" phase and the concept of planning for both coverage and check metrics from the…

    • 14 Sep 2010
  • Digital Design: Encounter 101: Implementing ECOs with ecoDesign

    BobD
    BobD

    When people say "ECO" in the context of back-end digital implementation tools, they can mean a number of things:

    • TCL commands that trigger netlist changes to the design
    • Functionality that takes RTL-based changes and automatically implements them automatically and surgically
    • Functionality that takes a new Verilog netlist and implements the changes to an existing database
    • Pre-mask or Post-mask (i.e., can the base…
    • 14 Sep 2010
  • SoC and IP: Late Event Notice: The Makers of the Microchip: Creating the Planar Integrated Circuit, Establishing Silicon Valley

    archive
    archive
    You still have two weeks to sign up for an extremely interesting lecture titled “The Makers of the Microchip: Creating the Planar Integrated Circuit, Establishing Silicon Valley” to be presented in Santa Clara at 6 pm on September 28, 2010. The event is sponsored by the Santa Clara chapters of the IEEE Electron Devices Society and the IEEE Computer Society and will be held at National Semiconductor’s Building E Auditorium…
    • 13 Sep 2010
  • SoC and IP: IEEE Spectrum article provides more insight into HP/Hynix memristor pact

    archive
    archive
    Despite some obvious technical flaws (DRAM cost/bit is not 10x less than NAND Flash! The article means to invoke the cost of hard-disk storage, not DRAM.), this article in IEEE Spectrum provides some additional insights into the recent pact between HP and Hynix to commercialize HP Labs’ memristor developments. Key takeaways:

    • “Hynix says it is looking to HP’s architecture to form the basis of its next-generation…
    • 13 Sep 2010
  • Digital Design: Encounter Puzzler Solution: Where Did My Fences Go?

    BobD
    BobD

    A couple of days ago I posted a puzzler on a scenario where fences couldn't be seen in Encounter.  Check it out HERE.

    Congratulations to Jason G for absolutely nailing it in the comments.  He was indeed corrrect -- the issue was that the fences didn't contain any standard cells within them, so the tool wasn't displaying them. That's because the default setting stiplulates that module guides with less than 100 instances…

    • 10 Sep 2010
  • SoC and IP: Pliant trades off firmware complexity against MLC NAND Flash capacity in enterprise SSDs

    archive
    archive
    The multiplicative storage capacity of MLC (multi-level cell) NAND Flash is a siren song to SSD manufacturers but the added storage has a price in terms of access speed and, perhaps more important, data reliability. When you’re storing two or more bits in a NAND Flash cell, there will inevitably be more data errors--which may sound like a really bad thing but it’s not if you have the right perspective. The HDD industry…
    • 9 Sep 2010
  • SoC and IP: Samsung sees continuing strong demand for NAND Flash

    archive
    archive
    Yesterday, I wrote that Samsung was sending caution messages about DRAM demand based on an expected softening of PC sales. Today, Electronics Weekly's David Manners reports the other half of that story. In the same press conference where he cautioned about DRAM demand, Samsung’s president Oh-Hyun Kwon reportedly stated “Strong demand for chips in tablets and smartphones will offset weakness in the PC market.” He was speaking…
    • 9 Sep 2010
  • SoC and IP: Is the latest DRAM bobsled run already coming to an end? Samsung and Hynix say “Maybe”

    archive
    archive
    The semiconductor business has been cyclic ever since it came into existence half a century ago. It seems as though someone at each cycle declares that the business has now learned its lesson and that it will no longer be cyclic. Memory analyst Jim Cantore refuted that meme at the recent MemCon 2010, held in Santa Clara, California. Like all businesses with extremely large capital expenditures, said Cantore, it’s not…
    • 8 Sep 2010
  • Verification: Tech Tip: Save Steps With Automatic Witness Checks

    TeamVerify
    TeamVerify

    This is just a quick reminder that the "witness_check" define command has an option called "auto".  When set to "auto" Incisive Formal and Enterprise Verifier ("IFV" & "IEV") will run the trace as usual, but if the trace status is "Fail" or "Explored" it will initiate the running of the trigger.  This setting may result in a little longer runtimes…

    • 8 Sep 2010
  • SoC and IP: Icy Dock internal multi-drive bay crams four 2.5-inch drives (SATA or SAS) into 5.25-inch slot (with video)

    archive
    archive
    OK, so this blog entry isn’t about memory so much as it’s about a cool ancillary product that you’ll want to look at--the Icy Dock MB994SP-4S 4 in 1 SAS / SATA Hot Swap Backplane RAID cage. This neat little example of metal bending allows you to cram four 2.5-inch drives (SSDs, for example) into one 5.25-inch drive bay. The dock comes with four little metal carriers for 2.5-inch drives and each drive bolts into a carrier…
    • 8 Sep 2010
  • SoC and IP: Super Talent caches Flash memory on USB 3.0 drive with 32 Mbytes of DRAM, performance improves as much as 300%

    archive
    archive
    There’s been plenty of discussion about using NAND Flash memory to cache HDDs and now Super Talent has introduced 32- and 64-Gbyte Flash-based USB 3.0 stick drives that incorporate 32-Mbyte DRAM caches to boost small block random performance by up to 300%. DRAM caching is not particularly new for SATA and SAS SSDs designed to replace HDDs but the Super Talent USB 3.0 Express RAM Cache drive looks like an ordinary USB…
    • 8 Sep 2010
  • Digital Design: Encounter Puzzler: Where Did My Fences Go?

    BobD
    BobD

    A while back I visited a customer I see on a fairly regular basis.  As soon as I entered the building, my primary contact asked if I'd stop off to talk with a colleague of his who had an Encounter problem.  It was a bad one -- he was dead in the water and he couldn't get past the issue.

    It's fairly unusual to look at a problem as an application engineer, and make quick suggestions that resolve problems.  Especially…

    • 8 Sep 2010
  • System, PCB, & Package Design : What's Good About Allegro PCB Editor Polygon Selection? Look at SPB16.3 and See!

    Jerry GenPart
    Jerry GenPart

    The Allegro PCB Editor allows selection of items by several means. In preselect mode, a single object or group of objects can be selected using a SHIFT left mouse button window select or by using a right mouse button Selection Set — Object browser. In the verb-noun mode, multiple items can be selected by windowing around the items to operate on, or by creating a temporary group of items to operate on. The window…

    • 8 Sep 2010
  • SoC and IP: SD Association adds pins to SD card format to boost transfer rates to 300 Mbytes/sec

    archive
    archive
    Hot on the heels of the rollout of high-speed SDHC and SDXC UHS-I cards that approach 100 Mbytes/sec (see previous blog entry), the SD Association has unveiled plans to add more pins to the physical SD package to boost read/write transfer rates into the hundreds of Mbytes/sec. The UHS-I spec currently has a maximum transfer rate of 104 Mbytes/sec. The new 4.0 SD specification, due out early next year, adds a second row…
    • 7 Sep 2010
  • SoC and IP: Toshiba to ship 32-Gbyte SDHC UHS-I cards with 95/80-Mbytes/sec read/write speeds

    archive
    archive
    If you’re a rabid fan of Canon dSLRs, you already know of the many controversial decisions made by Canon when it recently introduced the Canon 60D camera, the latest in a long line of xxD digital SLR cameras. Among the changes, Canon eliminated the use of Compact Flash (CF) cards in the 60D and added an SD card slot instead. This decision (among others) caused quite a cry to arise from Canon aficionados, who feel that…
    • 7 Sep 2010
  • SoC and IP: Rice U’s silicon-oxide memristor more phenomenon than device, for now

    archive
    archive
    Last Friday, I wrote about a memristor development out of Jim Tour’s nano research group at Rice University. The development involves the observation of nonvolatile memristance-like behavior in silicon oxide, rather than the titanium dioxide employed by HP’s memristor. Silicon oxide is a well-understood substance used in every silicon-based IC device now made. Presently, it’s used strictly for insulation, so seeing memristance…
    • 7 Sep 2010
  • SoC and IP: Update on Viking’s SATADIMM SSD--no cable needed, Sandforce SSD controller

    archive
    archive
    Previously, I wrote about Viking’s SATADIMM, an SSD built into a standard DDR DIMM (see “SSD Form Factors: Viking Modular Solutions talk at Flash Memory Summit explodes the possibilities”). Michael Bloebaum, owner of a company in the Netherlands named SSD Distribution, “announced” Viking’s SATADIMM in LinkedIn’s Solid State Disk Innovator’s group and prompted some good discussion. Gene Patino, VP of High Performance Products…
    • 3 Sep 2010
  • Verification: Users Employ Specman Constrained-Random Verification for Complex IP

    teamspecman
    teamspecman

    Two recent customer examples have shown the effectiveness of Specman constrained-random verification for complex SoCs. Raimund Soenning, manager of hardware development for the Graphics Competence Center at Fujitsu Semiconductor Europe (Germany), and Sarmad Dahir, ASIC designer at Ericsson (Sweden), have transitioned from traditional verification methods to a Specman-based, constrained-random, coverage-driven verification…

    • 3 Sep 2010
  • SoC and IP: Rice University reports that silicon oxide also good for memristors

    archive
    archive
    Hot on the heels of the announcement earlier this week that Hynix is now an active partner in commercializing HP’s titanium-dioxide memristors, a research team at Rice University in Houston, Texas has announced that it has discovered silicon oxide structures that also exhibit memristance. The Rice team, including nanomaterials specialist Jim Tour, and a design house named PrivaTran in Austin, Texas were experimenting…
    • 3 Sep 2010
  • Verification: Performance Tips and Tricks: Coding e Ports for Enhanced Performance

    teamspecman
    teamspecman

    This blog entry builds on last week's Tips and Tricks posting in which we discussed the usage of list.delete(0) in Tip 1.  This week, we discuss a topic that is close to many users.  Ports are used widely throughout the verification environment as one of the main mechanisms for interacting with HDL code running within the simulator.  Here are a few ways to improve performance when it comes to ports.

    Tip 2: Use Port …

    • 3 Sep 2010
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