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Verification: Specman-SimVision webinar on April 22 (next week!)

teamspecman

We interrupt Corey's excellent "When Less Is More" series to announce a Specman-SimVision webinar next week, April 22 at 10:00AM Pacific time. In short, if you’ve been using Specview with Specman/e and would like to learn all the key advantages of using the SimVision debug tool, this webinar is for you!
Date: April 22nd, 2010
Time: 10:00am PDT / 1:00pm EDT
Duration: 60 minutes
Sign Up Today! http://www…
- 13 Apr 2010
SoC and IP: Eurocom’s D900F Panther Notebook with 6-core Intel i7-980X processor: the shape of things to come for memory consumption

archive

With all the talk of DRAM growth in 2010, you might wonder what’s driving the consumption. It’s a very logical question. Sometimes, growth is simply driven by existing market momentum. Sometimes, it’s driven by a new product category such as Apple’s iPad, discussed earlier. And sometimes, there are disruptive changes in existing markets that also drive new waves of consumption. This blog entry is about one of those changes…
- 13 Apr 2010
SoC and IP: More signs of spring for the 2010 DRAM market

archive

Earlier, we reported on the appearance of several good economic signs springing up for the DRAM market. Here are a few more:

Late last month, EDN’s Ann Steffora Mutschler reported on Semico’s 1Q 2010 forecast calling for greater than 70% growth in DRAM sales this year. That’s on the heels of Q3 and Q4 2009 DRAM growth rates reported at 33% and 44% respectively (although it’s after a huge drop in 2008). Semico concludes…
- 13 Apr 2010
Verification: Hate Writing Assertions? No problem: let Automatic Formal Analysis do the work

TeamVerify

OR: “Leverage automatic checks extracted from designs without writing a single assertion”

What if a push button solution existed that ran a set of assertion checks on a design but did not require a single assertion to be written? Would you use it? Of course you would. However, many people believe that in order to benefit from Incisive Formal Verifier (IFV) or Incisive Enterprise Verifier (IEV) you need to know…
- 12 Apr 2010
Verification: New Blog: All About Integrated formal, Simulation, and Assertion-Based Verification Technologies & Methodologies

TeamVerify
End-users of Incisive Formal Verifier ("IFV"), Incisive Enterprise Verifier ("IEV"), or anyone interested in either "pure formal" verification, integrated formal analysis and simulation verification, and assertion-based verification (“ABV”) in general: have we got the blog for you!
Today "Team Verify" is proud to roll out this new blog covering:
Detailed tips, tricks, and power tools…
- 11 Apr 2010
SoC and IP: Apple iPad: no LPDDR2?

Denali Blog

Guest Blogger: Marc Greenberg, Technical Marketing Director

By now it seems that anyone with an engineering degree has probably read 2 or 3 teardown reports on Apple’s iPad. Few that I have seen so far talk about the DRAM memory subsystem -- and that could be because the DRAM was hidden on top of Apple’s A4 processor.

Chipworks.com has torn down Apple’s A4 processor package and reports that the DRAM subsystem consists…
- 9 Apr 2010
SoC and IP: Good times for DDR2 and DDR3 DRAM: Think Memcon 2010

archive

Several more bits of good DRAM news today appearing in DigiTimes and elsewhere point to the improving market for DRAMs. First, Scott Chen, vice president of the APAC Business Division of DRAM module maker Kingston Technology says that he sees signs of strong demand for DRAMs throughout this year. One of the reasons for this rosy outlook is the memory demand created by Microsoft Windows 7 purchases and upgrades. The incremental…
- 8 Apr 2010
System, PCB, & Package Design : What's Good About Windows 7? You'll Need SPB16.3 To See!

Jerry GenPart

OK, OK - I'm sure you don't "need" SPB16.3 to see all the cool whiz-bang features in Windows 7. But, you can now run the SPB16.3 (and very soon the ADW16.3) release on Windows 7.

You can always visit the Cadence Online Support Cadence Support News area for the latest information about releases, platforms, CDNLive information, etc. The official Windows 7 announcement for the SPB16.3 release can be found…
- 7 Apr 2010
SoC and IP: OCZ Technology unleashes 4th-generation PCIe-based SSD: 512Gbytes to 2Tbytes

archive

Yesterday, high-performance PC component developer and vendor OCZ Technology rolled out its 4th generation of PCIe-based SSD drives called the Z-drive R2 SSD. The new drives employ NAND Flash memory DIMMS arrayed on a standard PCIe-format add-in card. The cards employ x8 (8-lane) PCIe interfaces to achieve a rated read speed of as much as 1.3Gbytes/sec for the 512Gbyte SSD board and 1.4Gbytes/sec for the 1Gbyte and 2Gbyte…
- 7 Apr 2010
SoC and IP: DRAMeXchange says iPad intro will moderate NAND Flash market

archive

By Steve Leibson, Technology Evangelist, Denali Software

The recent, very successful launch of Apple’s iPad introduces both a new gadget and an entirely new product category to the consumer and business markets. Apple announced last Monday that it had sold more than 300,000 iPads on April 3, the first day that the iPad was available in the US. (That includes pre-orders, of course.) Note that this number tops the first…
- 7 Apr 2010
SoC and IP: DDR3/DDR2 price crossover reached

Denali Blog

Guest Blogger: Marc Greenberg, Director, Technical Marketing

The day is finally here - DRAMExchange.com quoted that the session average price of 1Gbit DDR3-800 parts on April 2nd was $3.03 while 1Gbit DDR2-800 was $3.04.

Only DDR2 memory manufacturers will be celebrating... you should realize that this point has been reached because of rising prices on DDR2 to meet the DDR3 prices, not because of falling DDR3…
- 6 Apr 2010
Verification: When Less Is More, Part 2: Is e Code Really Up to 3x More Compact Than SystemVerilog?

teamspecman

In my last post I wrote some packet generation code to validate the claim that e code can be up to 3 times more compact vs. the equivalent functionality in SystemVerilog. The result was actually an e description that was more than 3x less than the SystemVerilog equivalent. In this post, let’s see if these lopsided ratios carry forward to coverage as well.
If a user wanted to add coverage to the generation example…
- 6 Apr 2010
Digital Design: IR Drop Analysis: It's Not Really Necessary, Is It?

PeteMc

I was recently asked by an engineering manager if running IR drop analysis was really necessary. The argument to support his question was that his engineering team always over-designs the power rails, and so the risk of getting high IR drop was so small that analysis was not required.

The easiest way to answer his question was to relate what actually happened during the creation of a DAC demo a number of years…
- 5 Apr 2010
Analog/Custom Design: Things You Didn't Know About Virtuoso: It's Video Time!

stacyw

Just a quick post to let you know that there have recently been a whole truckload of videos added to the Cadence Online Support Video Library. (Some shameless self-promotion here--I created many of them...). Simply go to https://support.cadence.com/ (registration required) and choose Resources->Video Library. You may want to set up your product preferences to only view those product areas you're interested in.
…
- 1 Apr 2010
System, PCB, & Package Design : What's Good About Support Service And Design Bureau Providers? AcAe Can Help!

Jerry GenPart

I usually discuss our SPB solution technical capabilities in my weekly blogs, but decided to chat about this week's press announcement - "Cadence Teams with AcAe to Accelerate Customer Transitions to Allegro PCB Products" - and ask what works the best for you when you've engaged with a design services company.
Of course, Cadence offers services to help our customers enhance their design environments,…
- 31 Mar 2010
Verification: When Less Is More, Part 1: Is e Really Up to 3x More Compact Than SystemVerilog?

teamspecman

A famous expression in the software world is that “you can only expect 10 good lines of production code per day”. Web search for this phrase and you will see there is ongoing debate whether this figure is still only 10 lines, or it’s improved to 20, or 100, or more. One thing that’s not in dispute is that the more lines of code you need to support given task, the more difficult it is for others to comprehend…
- 30 Mar 2010
Digital Design: My DATE With 3DIC Technology

archive

This year DATE (Design, Automation and Test in Europe) was in snowy cold Dresden, Germany, March 8th-March 12^th and offered several 3DIC topics during the conference. I heard someone say "How did 3D with TSVs become hot from cold just so quickly?" In fact it did. Last year when I was following this technology I had found the design community to be hesitant in the feasibility of this technology in the beginning with lots…
- 29 Mar 2010
Analog/Custom Design: Video Demo: Your Maiden Voyage Across OCEAN

archive

I still remember my first encounter with OCEAN. It was 2002 and my co-worker had asked me to run a simple test for him. I sat in my cube, ruffling through our user guides, trying to quickly learn just enough to do the task at hand. The story ended happily, but I sure would have saved some time and frustration had I seen the following video. So for you OCEAN neophytes out there, here’s a nutshell video to get you out of…
- 29 Mar 2010
Verification: Accessing Physical Memory and Registers in a Virtual World

jasona

When working with Virtual Platforms that are running operating systems it's sometimes useful to be able to access a memory or peripheral from a normal user space program. This can help determine if the hardware is connected properly and it can he...
- 29 Mar 2010
System, PCB, & Package Design : What's Good About Taray? Quite a Bit Actually!

Jerry GenPart

You've probably read about all the buzz in the EDA news this week -

"Cadence acquires FPGA-focused EDA startup" and here.

"Cadence buys Taray in time for 28nm FPGAs"

"Cadence Acquires FPGA Tool Firm Taray"

"Cadence acquires Taray (why did it take them so long?)"

Of course, the Taray "7 Circuits" FPGA optimization technology had been integrated into the Cadence OrCAD and…
- 25 Mar 2010
Verification: Tweeting From a Standards Meeting: Good or Bad?

tomacadence

In my last blog entry, I mentioned that I was able to keep up with a lot of the discussion going on at a recent Accellera TSC meeting just by reading the tweets from the participants. That experience got me thinking about how much social media has changed the nature of such meetings, and the consequences of these changes. Clearly, public tweeting from confidential meetings related to your job is crazy and an invitation…
- 25 Mar 2010
Verification: Free eVC Generator From CFS Vision Update

teamspecman

In an earlier post Team Specman had the pleasure of introducing the free, open source software (FOSS) "CFS Vision" project. The CFS Vision team has now posted this brief introductory video on the Java-based eVC Generator utility described in our interview with their leader, Cristian Slav:

If video fails to play click here.

Enjoy the video, and this free utility!
Team Specman

P.S. Do you have…
- 24 Mar 2010
System, PCB, & Package Design : TeamAllegro Spices Up SNUG With Allegro PCB SI

TeamAllegro

Allegro PCB SI has supported multiple simulation engines for well over seven years. Other than the native TLsim engine, HSpice has been one of the more popular simulation engine choices. This year at SNUG, we have been invited to meet with HSpice users and show them the value of running HSpice directly from the Cadence Allegro PCB SI environment.

This demonstration shows HSpice running with IBIS models, and compares the…
- 24 Mar 2010
Verification: Crises In The Semiconductor Industry

Ran Avinun

I am on my way to Japan and I have just finished to read an excellent book and in my opinion a "must have" for any marketer and executive in the EDA and the semiconductor industries. The book is called "Chips and Change - How Crisis...
- 23 Mar 2010
Analog/Custom Design: Exceed On Demand And Virtuoso IC6.1

NewYorkSteve

Many of our customers use our Virtuoso software in combination with the windows emulation product from OpenText named "Exceed on Demand". To maximize performance between the two tools, we have some recommendations:

For IC6.1.4 and Exceed on Demand 7, these setting will cause problems between the two programs. You should change the settings to the following:

Steve Lewis
- 22 Mar 2010

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