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Any sports fan living in the US during the 70's and 80's will remember the dramatic introduction to ABC television's "Wide World of Sports":

"Spanning the globe to bring you the constant variety of sport… the thrill of victory… and the agony of defeat… the human drama of athletic competition… This is ABC's Wide World of Sports!"

I'll leave it…

Just a quick reminder that the ClubT series starts this week! Here are the specific dates and locations:

• Feldkirchen (Munich area), Germany on this Thursday October 15

• Eindhoven, The Netherlands on this Friday October 16

• Grenoble, France this coming Monday October 19

• Bristol, UK next Wednesday October 21
  
  

As always, these free events feature direct contact with Cadence R&D and Methodology experts to share developments…

I read an interesting article recently on EDN regarding a new way to determine cryptographic keys using leakage power. Differential power has long been documented to be a method of cracking keys. In this paper, the author, Milena Jovanovic of the University of Montenegro demonstrated that leakage power can also be used to predict the key contents.

I can’t pretend to understand the techniques behind cryptography…

Allegro PCB Librarian / Part Developer (PDV) Symbol Property Templates have been a very beneficial feature in the SPB16.2 release.

IEEE standards define a certain set of properties and their attributes for a symbol. Adding these properties individually to each symbol and setting the attributes according to the defined standards is a time-consuming and error-prone task for librarians. The Part Developer SPB16.2 release…

Everytime my wife and I are looking to buy a big item, we do our research by reading blogs, articles, and customer reviews. I have to tell you, the single best source for information is through customer reviews and testimonials by actual users. Testimonials not only included the good stuff, but they also include items that cover 'areas of improvement' in a particular product.

I think the concept is applicable…

The Cadence IC Packaging tools are complex, flexible tools that allow a designer freedom to create a package substrate layout in a myriad of ways. As a result, it becomes possible to run a particular feature at a time when the database is ill-configured to handle the request. Or, a given command could have a bug which results in the corruption of a specific database object in a manner that is not illegal to the database…

A while back, as we were preparing to launch our first phase of multi-core support in the Cadence Incisive Enterprise Simulator family, we started working on a press release. We decided to include the multi-core support added recently to Incisive Formal Verifier, in which formal engines can run in parallel to deliver assertion results faster. Then Yoon Kim, my neighbor in the next office, mentioned that Conformal Equivalence…

Just like natural languages, non-standard verification languages can fade away.  Sure, ancient Sumerian exists in the Code of Hammurabi, but all modern law is written in living languages.  Similarly, verification environments and VIP still exist in Vera, but a shrinking population understands and uses it.  To preserve the investment, that code base need to be both translated into a standard language like SystemVerilog…

Verification engineers have updated an old adage to discribe their projects:  Verification is both a sprint and a marathon!  We need to optimize everything from single simulation runs to the complete suite of regression tests and every task in between.  Cadence answered that comprehensive call in the Performance Leadership announcement issued September 29th, 2009.

This intrepid blogger thrives in the land of performance and…

Even sooner than the EU ClubTs is CDNLive San Jose 2009, where this year the event is a "hybrid" format of in-person workshops and on-line webinars.  As with past CDNLive's, the agenda spans the entire Cadence product line, subdivided into tracks for the major segments of the design & verification flow.  Of course, Functional Verification and System Design & Verification are major tracks:

http://www…

EU-based Specmaniacs and "Trailblazers" rejoice: the annual ClubT series is back!  As always, these free events feature direct contact with Cadence R&D and Methodology experts to share developments in advanced verification, updates to the "Trailblazer" program, and hear your emerging challenges and concerns.

In fact, we welcome YOU to present at ClubT!  If you have a 30-40 minute presentation on verification…

[Preface: all features in the 9.2 preview series are in Beta now.  We invite you to sign-up for the beta program and give this feature a test drive!]
[Team Specman welcomes Avi Bloch from Specman R&D to introduce one of “his” new features.]

Abstract
Starting in Specman/IES-XL 9.2, users will be able to split the profiling process into separate run and analysis phases. This allows users to generate a profiler…

I'm not proud to admit that I reacted with envy to the news that Twitter just received a $1 billion valuation.  This story inspired further chatter claiming that if Twitter plays their cards right, they could achieve a $5 billion valuation before long.  That's right: this fresh new internet combination of CB Radio, bad-but-fun TV, and primary source news, which barely existed even 1 year ago, could soon be worth more…

In the SPB16.2 release of Allegro PCB Editor, there are two (2) new very helpful features (among the many others) that assist PCB designers with component placement - Component Alignment and Placement Replication.

Component Alignment

• You can now specify a Vertical or Horizontal alignment of symbols based on their body center.
  • There are no associated options.

• The feature automatically attempts to determine the axis to align…

[Preface: we interrupt the Specman 9.2 Preview series to notify you of an update to the popular Specman-Matlab shareware package. Long before the term "crowd sourcing" was invented, our Application Engineers created and continue to maintain the venerable Specman+Matlab package described in this article. Guest blogger and Field colleague Jangook Lee is the latest to have refreshed it for a customer in Asia to support…

After delving into lots of new features in the Virtuoso Schematic Editor, the Library Manager and the Help System, I'd like to turn to our old friend ADE (aka Analog Design Environment, or for those of us who've been around awhile, Analog Artist).  ADE is another one of those tools that you're probably using exactly the same way you've always used it because--well, because that's the way you've always used it.…

Eye masks let you specify the acceptable parameters for what an eye should look like in order to extract clock transmissions and high-speed data to buffer models. The current method of creating and saving eye masks is tedious. SigWave  has been enhanced to allow you to create eye masks that you can save in .sim files and view/edit when you display the waveform in Eye Diagram mode.

One current use model for creating eye…

Since your circuit always runs at low-power, your verification should too.  To get that "always-on" low-power verification, Incisive Enterprise Simulator (IES) uniquely verifies low-power behaviors natively.  In some cases that can result in tests that run faster with power analysis on than with power analysis off - engage the warp engine!

IES introduced the most comprehensive native-compiled, low-power…

Allow me to interrupt my blogging on MarCom and DAC to pose a question inspired by the back-to-school season:

You may recall a question was posted to Mike Stellfox back in February about the availability of a limited, student version of Specman and IES-XL for the student's personal computer (vs. the full Specman/IES-XLs our University program partners are licensed to run on official school machines).  Unfortunately, Cadence…