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Latest Blog Posts

  • Verification: Users Take Over at CDNLive! 2008

    jasona
    jasona

    This year I did not attend CDNLive! in San Jose. I wasn't presenting anything and was quite busy with other things. The good news was that there were three ISX (Incisive Software Extensions) users making the presentations so I could stay home and keep working on the new stuff for the upcoming 8.2 release.

    Two years ago at CDNLive! 2006, I presented ISX for the first time to the Cadence Verification Community. The p…

    • 25 Sep 2008
  • Analog/Custom Design: Thanks Mr. Colton: Imitation really is the sincerest form of flattery

    NewYorkSteve
    NewYorkSteve

    Recognize the name Charles Caleb Colton? No? He was a British writer who in 1820 coined the phrase, "Imitation is the sincerest form of flattery." His words could not ring more true today. With some amusement, I watched the unveiling of a "new and revolutionary" custom design product on Monday, September 22.

    As I watched, I could not help to see that it had an umistakable familiarity (which was also…

    • 24 Sep 2008
  • Verification: The cell world

    Ran Avinun
    Ran Avinun
    Earlier this Summer, I was lucky enough to attend the CDNLive show in Japan. One of the keynote speakers at the show was Mr. Mitsuo Saito, Chief Fellow at Toshiba Corporation Semiconductor Company. Mr. Saito-san delivered a presentation about the 20 years battle for the fastest application-specific processors and the future direction of the semiconductor industry in his mind - dreaming "Cell" world.

    Mr. Saito…
    • 24 Sep 2008
  • System, PCB, & Package Design : TSV, mainstream or niche?

    SiPper
    SiPper

    I'm sure many of you will have read the article in Advanced Packaging click_here where the luminaries at Georgia-Tech talk about how TSV can take us to the next level of functional integration and miniaturization.  I have heard several companies (foundries and some iDM's) talking about pilot projects in this area, but will it really become prolific?  Are the days of die stacks using wirebonding numbered?

    My belief…

    • 24 Sep 2008
  • Analog/Custom Design: Latest Virtuoso news from CDNLive!

    NewYorkSteve
    NewYorkSteve

    Hey Folks, thanks to all of you who participated in CDNLive SV. There was a lot of great information shared by our customers as to their success using teh latest Virtuoso (which by the way has a new version IC6.1.3 out on downloads). 

    Three presentations that I would call your attention to come from our customers Freescale, Texas Instruments and ST Microelectronics. Each found new and interesting ways of using the advanced…

    • 22 Sep 2008
  • Verification: In the EU next week for "ClubT" verification events

    jvh3
    jvh3
    I'll be in the EU next week supporting "ClubT" events focused on advanced verification, with previews of new developments in the "Trailblazer" program. If you are based in the EU and are active in verification in any way, chances are you have already received a direct invitation to one of these events from our EU team.

    In case these events are news to you (and/or the invite email has been buried…
    • 19 Sep 2008
  • System, PCB, & Package Design : CDNLive! 2008 - San Jose: A brief Re-cap

    Jerry GenPart
    Jerry GenPart

    Wow - what a great time I had attending this year's CDNLive! 2008 event in San Jose. You can read the details in my prior posts from last week, but I'll provide a brief re-cap here:

    • By far, the most valuable aspect of attending CDNLive! is networking with customers and Cadence people. I heard this from all customers I spoke with and personally agree. Meeting the many customers I've worked with as an Application…
    • 17 Sep 2008
  • Analog/Custom Design: Video Demo: Spectre Turbo - Fasten your Seatbelts!!

    archive
    archive

    Although Spectre Turbo was released back in April, I hadn't found time to fully tinker with it. As I explored the idea of highlighting it on the community site, I tested it on at least 6 different designs, from VCOs to PLLs, testing both pre and post-layout, and Spectre Turbo chewed right through my sims. It not only drastically shortened my sim times but also maintained spice accuracy and that’s why I absolutely wanted…

    • 17 Sep 2008
  • Verification: Embedded Software Bugging and Debugging

    jasona
    jasona

    In one of my previous posts I introduced an interesting book titled Dreaming in Code. One of the great quotes from the book pertains to today's subject, embedded software debugging. If you don't have the book you can look it up on the book excerpt page of the author's website for the book.

    If you talk with programmers about this, prepare for whiplash. On the one hand, you may hear that things have never looked…

    • 17 Sep 2008
  • Verification: Getting more value from the OVM using Metric-Driven Verification

    mstellfox
    mstellfox

    With all of the momentum around the OVM these days there has been a lot of good discussion about testbench methodology. The OVM provides a great methodology framework for building modular, reusable verification environments, but there is more needed to get the full value of adopting an HVL like SystemVerilog or e.

    I have seen a lot of people adopt an HVL and continue doing directed testing -- that leads to a whole lot…

    • 15 Sep 2008
  • Verification: Verification community comes together to talk tech

    mstellfox
    mstellfox

    I just finished the week at Cadence's CDNLive User Group in San Jose. Over the past few years, it has really become a great technical event for the verification community. In fact, last year out of all the papers presented across the full breadth of Cadence tools and methodologies, Kelly Larson from Analog Devices won the Most Valuable Paper Award for his presentation which explained the benefits of migrating from VMM…

    • 13 Sep 2008
  • Verification: A few thoughts on CDNLive! and OVM 2.0

    tomacadence
    tomacadence

    My colleague Joe Hupcey has been keeping you informed and entertained with information and photos from this week's CDNLive! Silicon Valley event in San Jose. I've attended a fair number of talks and other activities at the show and I have to say that I found it very enjoyable.

    One of my most fundamental job-related beliefs is that you always learn something anytime you talk to any customer about anything. An event…

    • 12 Sep 2008
  • Verification: OVM 2.0 -- Short Technical Review

    Sharon
    Sharon
    By now you may have seen the official announcement of the OVM 2.0 release. So what does this update do for you as a verification engineer? While all of this information is in the OVM 2.0 User Guide, here are the highlights. You can also get more information from the Cadence OVM training class (Course 82153 [for verification engineers] or 82146 [for designers]), a Cadence OVM workshop, and from an OVM 2.0 webinar we will…
    • 12 Sep 2008
  • Verification: Day 3 of CDNLive San Jose

    jvh3
    jvh3

    Highlights of Day 3: papers all morning, lunch, then closing remarks. Comments on the day's events are annotated to the pictures posted here: Click.

     

    • 11 Sep 2008
  • Digital Design: Running SoC-Encounter...from an iPhone

    BobD
    BobD

    Hello from CDNLive Silicon Valley 2008!  I've had a great few days out here interacting with users- especially those who have interests that are well aligned with my areas of focus as an Encounter Applications Engineer.  That for me is the biggest benefit of attending conferences like these- the in-depth discussions you get into that follow on from presentations in the sessions.

    One of the coolest things I've seen this…

    • 11 Sep 2008
  • System, PCB, & Package Design : CDNLive! Track 8 - The Place to Be!

    Maxwell86
    Maxwell86

    Lively presentation on IBIS-AMI modeling, multi-gigabit package design, 3D field solvers, and advance constraint management have been taking place this week at CDNLive!  If you have missed it, there is still one more day where you can learn about IC-Package co-design and manufactuing aware package design.  If you do miss it, I'll blog later with pointers to these presentations once they are posted.

    Hope to see you…

    • 11 Sep 2008
  • Verification: Day 2 of CDNLive San Jose 2008

    jvh3
    jvh3

    Highlights of Day 2: more great papers (with enough customer papers on OVM fill almost all of verification track 1), a lot of Designer Expo time (expo for breakfast, lunch and dinner in fact), the new System Level roadmap, and poker!  Here is the day in pictures (from a verification guy's perspective -- there is a lot more going on in the other tracks that I'm missing):

    http://www.flickr.com/photos/24605532@N08…

    • 10 Sep 2008
  • System, PCB, & Package Design : CDNLive! 2008 - San Jose: Day 3 ... Product Roadmaps, More Presentations, and Poker!

    Jerry GenPart
    Jerry GenPart

    From the floor of CDNLive! 2008 - San Jose

    Each day continues to show the value that customers and Cadence employees gather through networking with each other - learning about innovative technical solutions developed to enhance how we interact with the Cadence flows, solutions, and products.

    A very intriguing presentation was made by Phil Gordon (Professional Poker Player/Analyst) to start the morning off. While Phil discussed…
    • 10 Sep 2008
  • Verification: Day 1 of CDNLive San Jose 2008

    jvh3
    jvh3
    Suffice to say, Day 1 was quite a full day, with the highlight for me being some really good papers from end users (which is not to take anything away from the keynotes, or the Enterprise Manager Team's unveiling of "Enterprise Planner" and database today).  Long story short: when you add up the panels and customer papers, the day's themes seem to boil down to:

    1.) It will always be a multi-language world…
    • 9 Sep 2008
  • System, PCB, & Package Design : CDNLive! 2008 - San Jose: Day 2 ... Welcome, Keynote Speakers, Presentations

    Jerry GenPart
    Jerry GenPart

    From the floor of CDNLive! 2008 - San Jose

    Wow! What an exciting, power packed, and full day - and, it's still going!!

    Michael Catrambone (Steering Committee Chairman, UT Starcom, Inc.) and Ted Vucurevich (Senior Vice President, Chief Technology Officer Advanced Research & Development) delivered Welcome remarks.

    Here's a picture of us gathering for the Welcome addresses and of Ted during his presentation -


    The…

    • 9 Sep 2008
  • Verification: Enterprise Verification gets a boost (a big one!)

    Steve Brown
    Steve Brown

    Today we announced important new metric-driven verification capabilities in our enterprise verification solution. My video blog post below provides a quick introduction of the motivations and capabilities. Please take a look and feel free to comment below.

    • 9 Sep 2008
  • Verification: "Day 0" of CDNLive San Jose 2008

    jvh3
    jvh3

    Quick report from CDNLive Day 0 (I've labeled it that since this initial day was devoted to techtorials, ahead of the main events and papers tomorrow) First, the promised photos from the day's events are posted here.

    * MDV techtorial snapshot: from the segment I saw, there was a lot of Q&A.  This came as no surprise to me since I've seen the presenter, Solution Architect Paul Carzola, teach this material before…

    • 9 Sep 2008
  • Verification: CDNLive SJ - system design and verification - don't miss it

    Ran Avinun
    Ran Avinun

    If you are a system validation/verification engineer, an architect, a power engineer or an embedded SW engineer, you should stop-by and visit us at CDNLive. See below some specific information on what you will be able to see in this domain: Hope to see you there.

    - Ran

    Day 1 - Monday - was very exciting with fully packed agenda including a full day of system design and verification techtorial with demos, customers and partne…

    • 8 Sep 2008
  • System, PCB, & Package Design : CDNLive! 2008 - San Jose: Day 1 ... from the Techtorials!

    Jerry GenPart
    Jerry GenPart
    From the floor of CDNLive! 2008 - San Jose
    The first day, is always considered the calm before the masses of engineers, managers, and executives arrive at CDNLive. There are several Techtorials presented from each of the 9 tracks. I attended the PCB Design techtorial which included the SPB16.2 What's New features for -
    • The Front End Tools (DEHDL, Constraint Manager, PCB Librarian, ASA)
    • PCB SI
    • Allegro PCB Editor
    Aditya…
    • 8 Sep 2008
  • Digital Design: Need for dynamic IR drop analysis at floor and power planning stages?

    RahulD
    RahulD

    Here is a question for all the power grid designers out there: Do you see the need to do quick early dynamic rail analysis during floor and power planning stages of our design? With introduction of the Cadence Encounter Power System today, Cadence First Encounter and SoC Encounter users will have access to the Encounter Power System signoff engines during floor or power planning design stages at no additional cost.

    This…

    • 8 Sep 2008
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