• Analog/Custom Design Blogs

    Never miss a story from Analog/Custom Design. Subscribe for in-depth analysis and articles.

    Subscribe by email
  • More
  • Cancel
Featured

When AI Becomes Part of Your Analog Design Workflow

If you design analog or mixed-signal circuits, each silicon generation asks you to…

Corporate
• 6 min read
Virtuoso AI Studio , featured , agentic ai , IP Catalog , analog design

Virtuoso Studio IC25.1 ISR8 Now Available

Virtuoso Studio IC25.1 ISR8 production release is now available for download.

Virtuoso Release Team
• 5 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog

Analog Design Migration Made Easy With Migration Cockpit

Analog IP remains one of the most valuable and difficult-to-scale assets in semiconductor…

Vinod Khera
• 5 min read
featured , analog IP , Automated test bench migration , parasitic aware optimization , Front to back Analog Migration
Analog/Custom Design
Latest blogs

Spectre Tech Tips: Spectre Voltage Domain Check

This blog introduces you to the static voltage domain check in the Spectre circuit…

• 3 min read
Spectre 21.1 , Analog Simulation , Spectre Circuit Simulator , Spectre X Simulator

Virtuoso Video Diary: Do More With eyeHeightAtXY and eyeWidthAtXY Calculator Functions…

Read through this blog to know more about the enhancements made to the eyeHeightAtXY…

• 3 min read
ISR22 , eyeWidthAtXY , Cadence blogs , ICADVM18.1 , cadence , special functions , digital communication , pam4 , Virtuoso Visualization and Analysis XL , Virtuoso Analog Design Environment , Virtuoso , eye diagram , ViVA , NRZ , Virtuoso Video Diary , ICADVM20.1 , eye height , usability , eye width , Custom IC Design , calculator , eyeHeightAtXY , IC6.1.8

Spectre Tech Tips: Identifying and Resolving Spectre Accuracy Issues Caused by Multiple…

A significant number of accuracy issues in Spectre simulations are caused by the…

• 6 min read
spectre aps , DC Solution , Analog Simulation , simulatiom , Spectre , Spectre X Simulator

Virtuoso Meets Maxwell: How to Perform an XOR Operation on a Package Design Interchanged…

While Allegro Package Designer Plus together with SiP Layout Option is and continues…

• 7 min read
XOR SiP against OA Form , SiP , Void , XOR , Physical Verification System (PVS) , Virtuoso Layout EXL , Virtuoso Meets Maxwell , Annotation Browser , Virtuoso RF Solution , Virtuoso RF , Layers Assistant , oa , SiP Layout Option , ICADVM20.1 , layers , PVS , connectivity

Virtuosity: Custom IC Design Flow/Methodology – Introduction

Read this blog for an introduction to the Custom IC Design methodology and the key…

• 3 min read
Pegasus Verification System , Virtuoso Schematic Editor , Analog Design Environment , ADE Explorer , Virtuoso Space-based Router , AMS in ADE , VSR , AMS Designer , Rapid Adoption Kit , Analog Simulation , ADE , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso , Spectre , ViVA , Quantus Extraction Solution , Virtuosity , ICADVM20.1 , AMS simulation , Quantus , Custom IC Design , Virtuoso Layout Suite EXL , Virtuoso Layout Suite , Custom IC , IC6.1.8 , ADE Assembler

Virtuoso ICADVM20.1 ISR22 and IC6.1.8 ISR22 Now Available

The ICADVM20.1 ISR22 and IC6.1.8 ISR22 production releases are now available for…

• 2 min read
Cadence blogs , ADE Explorer , Announcement blog , Virtuoso RF Solution , Virtuoso , ICADVM20.1 , IC Release Blog , Custom IC Design , Custom IC , ADE Verifier , IC design , IC6.1.8 , Analog IC Design , ADE Assembler

Virtuosity: Tagging Variables and Corners in Virtuoso ADE Assembler

You can now assign tags to variables and corners in Virtuoso ADE Assembler. Check…

• 4 min read
Corner Tags , ADE , Virtuoso Analog Design Environment , Virtuoso , Variable Tags , Virtuosity , ICADVM20.1 , usability , Custom IC Design , Custom IC , IC6.1.8 , ADE Assembler

Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 12 - Using Quview and…

This blog shows how Quantus Geometry Viewer (Quview) can be used to view various…

• 5 min read
blended , Pegasus Verification System , pegasus , Quantus Connectivity Checker , training , Cadence training , digital badges , training bytes , Virtuoso , Cadence certified , Virtuoso Video Diary , Cadence Education Services , Quantus , Custom IC Design , online training , Quview

Virtuoso Video Diary: Usability of the Graph Summary Label in Virtuoso Visualization…

Read through this blog to know more about the usability enhancements made to the…

• 3 min read
Analog Design Environment , direct measurements , Cadence blogs , cadence , histograms , Virtuoso Visualization and Analysis XL , Virtuoso Analog Design Environment , Virtuoso , Virtuoso Video Diary , usability , Custom IC Design

Virtuosity: Virtuoso Design Intent Notes Now Speak Many Languages

Starting with ICADVM20.1 ISR20, you can write Design Intent notes in languages that…

• 2 min read
Virtuoso Design Intent , Virtuoso Schematic XL , Virtuoso Analog Design Environment , Virtuoso , Virtuosity , ICADVM20.1 , Constraints , design intent , Custom IC Design , Custom IC , Virtuoso Layout Suite XL

Virtuoso ICADVM20.1 ISR21 and IC6.1.8 ISR21 Now Available

The ICADVM20.1 ISR21 and IC6.1.8 ISR21 production releases are now available for…

• 3 min read
Cadence blogs , ADE Explorer , IC Release , Announcement blog , Virtuoso RF Solution , Virtuoso , ICADVM20.1 , IC Release Blog , Custom IC Design , Custom IC , IC design , IC6.1.8 , Analog IC Design , ADE Assembler

Virtuoso Video Diary: Knowledge Booster Training Bytes Part 11 - Navigating Through…

This blog shows how you can easily navigate through tabbed Training byte channels…

• 4 min read
blended , channel , Spectre AMS Connector , Spectre AMS Designer , training , Mixed-Signal , digital badges , training bytes , Spectre , Cadence certified , Virtuoso ADE Explorer

Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 10 Virtuoso Schematic…

This Blog shows how the Virtuoso Schematic Editor tool provides numerous capabilities…

• 3 min read
blended , Virtuoso Schematic Editor , training , Cadence training , training bytes , Virtuoso , Cadence certified , Virtuoso Video Diary , Cadence Education Services , Custom IC Design , online training

Virtuoso Meets Maxwell: Viewing Your Mesh in EMX Planar 3D Solver

Paying attention to how you mesh your EM structures is as important as quality port…

• 5 min read
Virtuoso 3D Viewer , Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , Layers Assistant , EMX Models , Electromagnetic analysis , Virtuoso , EMX , Custom IC Design , EMX Solver , Virtuoso Layout Suite , Custom IC , 3D Mesh

Spectre Tech Tips: Big Data with Spectre SQL Database

As a design gets bigger, simulation generates big data. As data gets bigger, so does…

• 3 min read
APS , Dynamic Checks , assert , Spectre , check , static checks

Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 9 Introduction to Virtuoso…

This Blog shows how the Virtuoso Module Generators provide a way to generate multiple…

• 4 min read
blended , Module Generator , training , Cadence training , digital badges , training bytes , Virtuoso , Cadence certified , Virtuoso Video Diary , Cadence Education Services , Custom IC Design , online training , Floorplanner

Virtuoso ICADVM20.1 ISR20 and IC6.1.8 ISR20 Now Available

The ICADVM20.1 ISR20 and IC6.1.8 ISR20 production releases are now available for…

• 4 min read
Cadence blogs , ADE Explorer , Virtuoso Layout EXL , Virtuoso RF Solution , IC Release Announcement blog , fluid guard ring , Virtuoso Analog Design Environment , Virtuoso , ICADVM20.1 , IC Release Blog , Custom IC Design , Custom IC , IC6.1.8 , ADE Assembler

SPECTRE 21.1 Release Now Available

The SPECTRE 21.1 release is now available for download at Cadence Downloads.

• 1 min read
spectre aps , Spectre 21.1 , Spectre RF , spectre fx

Virtuosity: Have You Joined the Computational Fluid Dynamics Bandwagon Yet?

A guest blog to let you know about Cadence’s recent ventures into the world of Computational…

• 5 min read
CFD , Aerospace , Pointwise , Wind Study , Computational Fluid Dynamics , CFD Vision 2030 , Virtuosity , NUMECA , Omnis

Virtuoso Meets Maxwell: How the Revamped Feature-Intensive Export Die GUI Empowers…

Die export has evolved and it’s time to introduce the new look and feel of the GUI…

• 5 min read
Transfer Area , die export , IO pads , Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , die , pin numbering , ICADVM20.1 , Custom IC Design , Virtuoso Layout Suite EXL , shapes , bumps , VMM

Spectre Tech Tips: Spectre High Impedance Node Check Overview

Circuit checks enable you to analyze typical design problems, such as high impedance…

• 4 min read
spectre aps , dyn_floatdcpath , dyn_float_tran_stat , dyn_highz , highz , static_highz , Spectre , static checks , spectre x , Design Checks , floating node

Virtuosity: More Usability Enhancements in Virtuoso ADE Assembler and Virtuoso ADE…

We've been busy improving the usability of the Analog Design Environment products…

• 3 min read
Analog Design Environment , ADE Explorer , designing analog circuits , make editable , run point selection , ADE , variables , Virtuoso Analog Design Environment , analog integrated circuit design , make read-only , analog design , usability , Custom IC Design , ADE Assembler

Virtuosity: Making Optimum Use of Resources in Distributed Farm

Details on a dedicated tab "Resources" in Job Policy form, which helps to do resource…

• 4 min read
SGE , Analog Design Environment , LBS , Job Policy , ADE , LSF , Virtuoso , Virtuosity , distributed processing , Custom IC Design , IC6.1.8 , Assembler , ADE Assembler

Virtuoso ICADVM20.1 ISR19 and IC6.1.8 ISR19 Now Available

The ICADVM20.1 ISR19 and IC6.1.8 ISR19 production releases are now available for…

• 3 min read
Cadence blogs , ADE Explorer , guard ring , Virtuoso Layout EXL , Virtuoso RF Solution , IC Release Announcement blog , fluid guard ring , EMX Models , Virtuoso Analog Design Environment , ICADVM20.1 , Custom IC Design , Custom IC , IC6.1.8 , Analog IC Design

Virtuoso Meets Maxwell: Virtuoso RF Solution Product Page on Cadence Learning and…

Virtuoso RF Solution is known for its extensive problem-solving capability that touches…

• 5 min read
VRF , Virtuoso Meets Maxwell , COS product page , Virtuoso RF Solution , Virtuoso RF , Spectre , Clarity 3D Solver , Cadence Learning and Support portal , Custom IC Design , VMM

Virtuoso Video Diary: LSCS Job Control Mode - The Enabler for Cloud Simulations

The new Large-Scale Cloud Simulation (LSCS) job control mode is highly scalable and…

• 5 min read
cloud simulations , Virtuoso ICADVM20.1 , ADE Explorer , custom IC simulation , ADE XL , cloud , ADE , Virtuoso Analog Design Environment , Virtuoso Video Diary , Virtuoso IC6.1.8 , large-scale simulations , Custom IC Design , ADE Assembler

Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 8: Mixed-Signal Modeling…

This blog describes the behavioral modeling aspects of Verilog-AMS language that…

• 4 min read
blended , verilogams , ADE Explorer , Explorer , Verilog-AMS , training , Mixed-Signal , Verilog , Cadence training , digital badges , training bytes , Virtuoso , Analog IC Design videos , Spectre , Cadence certified , Virtuoso Video Diary , Verilog AMS , Custom IC Design , online training , Custom IC , Assembler , ADE Assembler , verification

Spectre Tech Tips: Upgrading to SPECTRE 20.1

SPECTRE 19.1 ISR18, the last ISR of the SPECTRE 19.1 ISR release, was released on…

• 1 min read
Circuit simulation , Spectre
Blog - Title