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Featured

Virtuoso Studio IC25.1 ISR2 Now Available

Virtuoso Studio IC25.1 ISR2 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 23 Oct 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Spectre 25.1 Release Now Available

The SPECTRE 25.1 release is now available for download at Cadence Downloads. For…

SpectreReleaseTeam
SpectreReleaseTeam 5 Aug 2025 • 1 min read
featured , Spectre FMC Analysis , Spectre RF , Spectre Photonics , Spectre AMS Designer

Accelerating RFIC EM Analysis with EMX Planar 3D Solver in Virtuoso HI Platform

In modern IC design, especially with the rise of heterogeneous integration, electromagnetic…

Pratul Nijhawan
Pratul Nijhawan 3 Jun 2025 • 6 min read
blended , blended training , featured , Virtuoso Studio , Virtuoso System Design Environment
Analog/Custom Design

Latest blogs

Virtuosity:Expression Builder - Now Plots ALL!

The Expression Builder has simplified writing complex expressions and has the ability…

Arja H 19 Jan 2018 • 2 min read
ADE Explorer , ADE , Expression Builder , Virtuoso , ViVA , Virtuosity , ADE Assembler

Virtuosity and Virtuoso Video Diary: Onwards and Upwards

Looking back at 2017, I note with satisfaction that it was a phenomenal year of blogging…

Ashu V 16 Jan 2018 • 3 min read
Cadence blogs , custom/analog , Virtuoso , RF design , Virtuosity , Virtuoso Video Diary , Custom IC Design , Custom IC

Automatically Reusing an SoC Testbench in AMS IP Verification

The complexity and size of mixed-signal designs in wireless, power management, automotive…

msteam 4 Jan 2018 • 1 min read
AMS , mixed signal design , mixed-signal methodology , mixed signal solution , analog , Mixed-Signal , analog/mixed-signal , Virtuoso environment , mixed-signal verification

Virtuosity: From Hatchlings to Fledglings to a Flock of Birds Blogging Together

“The reason birds can fly and we can't is simply because they have perfect faith…

Rishu Misri Jaggi 14 Dec 2017 • 2 min read
Cadence blogs , Virtuoso , RF design , Virtuosity , Virtuoso Video Diary , CPG Technical Communications Engineering

Virtuosity: SKILLful Virtuoso Visualization and Analysis

If you’re a SKILL enthusiast, you’ll be happy to know that the latest IC6.1.7 ISR…

Ashu V 10 Dec 2017 • 4 min read
Analog Design Environment , ViVa-XL , custom/analog , Analog Simulation , SKILL for the Skilled , ADE , Virtuoso , ViVA , Virtuosity , Custom IC Design , SKILL , Cusstom IC Design

Virtuosity: Can I Graphically Edit Width Spacing Patterns?

We have enhanced the editing modes available for WSPs. In addition to the text-based…

KomalJohar 7 Dec 2017 • 1 min read
Routing , Advanced Node , width spacing patterns , Layout , Virtuoso , Virtuosity , Custom IC Design

Virtuosity: Can I Plot Signals with Different Axis Units in the Same Window?

Have you been frustrated trying to drag signals around in Virtuoso Visualization…

Arja H 5 Dec 2017 • 1 min read
virtuoso visualization and analysis , Virtuoso Analog Design Environment , Analog Design Environment , ViVA

Virtuosity: CDNLive India—Our Window to KYC!

In line with the recently-implemented mandate in India requiring banks and financial…

Rishu Misri Jaggi 4 Dec 2017 • 1 min read
CDNLive India 2017 , Cadence Help Future , Virtuosity , Virtuoso Video Diary , Cadence Help 3.0

Virtuosity: Organizing Waveform Families

When plotting waveforms in Virtuoso Visualization and Analysis across sweeps you…

Arja H 21 Nov 2017 • 2 min read
ADE GXL , ADE Explorer , ADE XL , ADE , Virtuoso Analog Design Environment , Analog Design Environment , ViVA , Virtuosity , ADE Assembler

Dealing with AOCVs in SRAMs

Systems on Chip, or SoCs as they’re more commonly called, have become increasingly…

Priyab 16 Nov 2017 • 4 min read
legato , custom/analog , Monte Carlo analysis , Monte Carlo , Spectre , Custom IC Design , Custom IC

Virtuosity: All New XStream In - The Translation Expressway

A layout design has to go through several iterations and multiple data exchanges…

Sucharita 10 Nov 2017 • 6 min read
xstream in , design data translator , xstream in import , eda import

Art of Analog Design Part 7: Mismatch Tuning

In days of future past, we looked at DC mismatch analysis and compared it to Monte…

Art3 3 Nov 2017 • 4 min read
mismatch tuning , Monte Carlo analysis , DC Mismatch

Simplifying the Memory Design Process

On today’s SOC designs, the memory control logics and memory arrays take up a lot…

Kim Khoury 30 Oct 2017 • 2 min read
Memory , custom/analog , Spectre , Custom IC Design , Custom IC

Virtuosity: Read Mode Done Right

Because of the ease with which you can set up complex sweep, corner and Monte Carlo…

stacyw 26 Oct 2017 • 4 min read
ADE Explorer , Custom IC Design. Read only , ADE , Analog Design Environment , ADE Assembler

The Art of Analog Design Part 6: Response to Frank’s Question to Part 4

In the comments to blog #4, Frank Wiedmann asked about the correlation between the…

Art3 23 Oct 2017 • 3 min read
spectre aps , Virtuoso Variation Option , ADE Explorer , mismatch analysis , Analog Simulation , Monte Carlo analysis , DC Mismatch , Custom IC Design

The Art of Analog Design Part 4: Mismatch Analysis

In Part 3 , we started to explore how to analyze the results of Monte Carlo analysis…

Art3 15 Oct 2017 • 3 min read
spectre aps , Analog Design Environment , Virtuoso Variation Option , mismatch analysis , Analog Simulation , Monte Carlo , Custom IC Design

The Art of Analog Design Part 5: Mismatch Analysis II

In Part 4 of the series, we looked at applying mismatch analysis as a design tool…

Art3 13 Oct 2017 • 3 min read
spectre aps , offset voltage , mismatch analysis , Analog Simulation , ADE , Monte Carlo analysis , Strong Arm latch , dynamic comparator

Virtuosity: Can I Speed up My Plots?

If your Virtuoso ® ADE Assembler, Virtuoso ® ADE Explorer or Virtuoso ® ADE XL setup…

AdityaMainkar 13 Oct 2017 • 3 min read
Analog Design Environment , ADE GXL , ADE Explorer , Explorer , ADE XL , analog , license , ADE , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso , ADE-GXL , Analog Design Environment , ViVA , ADE-XL , Virtuosity , mixed signal , Custom IC Design , ADE Assembler

Virtuosity: Power Filtering!

Finally, we have filters in the Corners Setup form, Results tab, Outputs tab, Data…

Arja H 5 Oct 2017 • 2 min read
Analog Design Environment , ADE Explorer , Filtering , ADE , Virtuoso Analog Design Environment , Analog Design Environment , ADE Assembler

The Art of Analog Design: Part 3, Monte Carlo Sampling

In Part 2, we looked at Monte Carlo sampling methods. In Part 3, we will consider…

Art3 22 Sep 2017 • 4 min read
Analog Design Environment , APS , ADE Explorer , Analog Simulation , analog , ADE , Monte Carlo , Analog Design Environment , ViVA , ADE Assembler , Cusstom IC Design

Virtuosity: Sweeping Multiple DSPF Views in ADE

Wouldn't it be great if you could have a view for your DSPF files and sweep them…

Arja H 22 Sep 2017 • 3 min read
Analog Design Environment , ViVa-XL , custom/analog , ADE Explorer , Analog Simulation , DSPF , ADE , Block-level simulation , Virtuoso Analog Design Environment , Analog Design Environment , Schematic Editor , ViVA , Virtuosity , Circuit Design , Custom IC Design , Schematic , ADE Assembler

Virtuosity: Sweeping Multiple Config Views

Before IC6.1.7 ISR10, you could sweep multiple views in ADE for only one block in…

Arja H 18 Sep 2017 • 2 min read
Analog Design Environment , ADE Explorer , Explorer , Analog Simulation , ADE , Virtuoso Analog Design Environment , Analog Design Environment , Schematic Editor , Virtuosity , Circuit Design , Custom IC Design , Schematic , ADE Assembler

Virtuosity: What Color is Your Virtuoso Wearing Today?

Like you, Virtuoso can dress in a different color too every day. Interested to know…

Rishu Misri Jaggi 15 Sep 2017 • 3 min read
Customize Virtuoso , Virtuoso Editor , color , color-aware design , Virtuosity , Custom IC

Virtuosity: Driving Along a Longer Route May Take You Home Sooner!

On my way back home every day, I need to make a decision — should I drive less, or…

Rishu Misri Jaggi 12 Sep 2017 • 4 min read
library manager , Virtuoso , Virtuosity , physConfig , CPH , copy library , Custom IC

Virtuosity: Saving, Loading and Sharing ADE Annotation Settings

The whole ADE annotation flow was overhauled way back in IC6.1.6 but at that time…

Arja H 7 Sep 2017 • 4 min read
ADE Explorer , Annotation Settings , ADE Annotations , ADE , Analog Design Environment , Schematic Editor , Virtuosity , Schematic , ADE Assembler , annotation setup

Virtuoso Video Diary: What Are Parametric Sets?

Over the past few IC6.1.7 and ICADV12.3 ISR releases, a lot of new and useful features…

Ashu V 4 Sep 2017 • 4 min read
Analog Design Environment , ADE Explorer , Explorer , analog , ADE , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso , Analog Design Environment , Virtuoso Video Diary , Circuit Design , mixed signal , Custom IC Design , Assembler , custom design technology , ADE Assembler , Cusstom IC Design

Photonics Summit and Workshop 2017

Interested in learning about system-level integration of electronic/photonic devices…

FormerMember 16 Aug 2017 • 1 min read
Phoenix , Lumerical , Photonics Summit , photonics , Custom IC Design

The Art of Analog Design Part 2: Monte Carlo Sampling

Historically, one of the great challenges that analog and mixed-designers face has…

Art3 12 Aug 2017 • 9 min read
Interval of Confidence , Monte Carlo with auto-stop , confidence level , Low Discrepancy Sampling , Clopper-Pearson , Pelgrom’s Law , Monte Carlo analysis , Latin Hypercube Sampling
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