Featured

Accelerating Chiplet Innovation with a New Partner Ecosystem

The semiconductor industry is currently undergoing a massive shift. As we push the…

Mick Posner
• 4 min read
IP , featured , chiplets , physical ai , OCP FCSA

The Memory Imperative for Next-Generation AI Accelerator SoCs

The tremendous growth in large language model (LLM) size corresponds with an equally…

Subash Peddu
• 4 min read
featured , HBM , SoC , AI

Scale-Up and Scale-Out IP for Optical Interconnect for Accelerated Computing

Optical connectivity is foundational to modern data centers, enabling high-bandwidth…

HW202512191014
• 4 min read
featured , AI data center , AI factory , Data Center architecture
SoC and IP
Latest blogs

16Gbps Multi-link, Multi-protocol SerDes at the 21st IEEE European Test Symposiu…

The 21 st European Test Symposium (IEEE EST) took place in Amsterdam (Netherlands…

• 1 min read
16gbps , PCIe Gen4 , SerDes , Multi-link , multi-protocol

What Memory Best Fits Your Application?

With highly effective DDR4 and LPDDR4 class memories, it’s not always easy to know…

• 1 min read
DDR4 , LPDDR4 , 4266 , 3200

Continued Strength of the Design&Reuse IP-SoC India

Design&Reuse events are always exciting for their draw of an IP-centric audience…

• 1 min read
PCIe Gen4 , 10G-KR , SerDes

Cadence and Hardent demonstrate high resolution display interface for Automotive

At Cadence we aim to enable our customers’ need to reduce their own design time and…

• 1 min read
Hardent , Design IP , MIPI Alliance , CDNLive , DIP , MIPI , DSI , DSC

High Speed East-West Interconnect at the Open Server Summit

This year’s Open Server Summit served up plates full of data…if it wasn’t obvious…

• 1 min read
PCIe Gen4 , 10G-KR , SerDes

CDNLive Silicon Valley 2016—The Bigger IP Picture

When a presentation makes us think about an industry on a whole new level and rethink…

• 1 min read
CDNLive , ip cores , Design IP and Verification IP

50 Years of Turning Optical Dreams into Reality

Anaheim Convention Center (CA) was the center of a spectacle of technology that continues…

• 3 min read
Optical , PCIe Gen4 , OFC , Fiber , PCIe

Design IP Customer and Technology Presentations at CDNLive Silicon Valley, April…

We have an exciting Design IP track at CDNLive Silicon Valley again this year. ARM…

• 1 min read
Design IP , CDNLive , PCIe Gen4 , DIP , SerDes , Silicon Valley

Tech Shanghai Drives Innovation by Overcoming Challenges

Far more often than we imagine, we think about China within the context of the complicated…

• 2 min read
China , DDR4 , PCIe Gen4 , tech shanghai

TSMC’s Technology Symposium 2016 is the Place to be for Innovation

At this year’s Technology Symposium, TSMC disclosed that they will provide two N7…

• less than a min read
DDR4 , LPDDR4 , TSMC Tech Symposium , ip cores , PCIe , 16FF+

DDR/LPDDR 4/3 Combo PHY in TSMC 28HPC Silicon Proven at 2400 Mbps

Back in October we announced the TSMC 28HPC tapeout of our DDR/LPDDR 4/3 Combo PHY…

• 1 min read

The most powerful feature of USB Type-C – Power Delivery

One thing that all mobile electronics devices have in common is that they all need…

• 1 min read
USB 3.0 , Jacek Duda , Consumer Electronics Show , CES , USB-IF , USB , power delivery , USB 2.0 , Type-C , USB connector , USB 3.1

See Demonstration Video of PCIe 4.0 PHY IP in TSMC 16FF+

Did you miss DesignCon this year? If so, you also missed the demonstration of our…

• less than a min read
DesignCon , PCIe Gen4 , pcie4 , SerDes

DesignCon Demonstration of IP for PCIe 4.0 and 16Gbps Multi-Protocol PHY

We enjoyed sharing our latest news with the many people who visited our booth at…

• less than a min read
DesignCon , PCIe Gen4 , pcie4 , Design IP and Verification IP , SerDes

New 16Gbps Multi-link, Multi-protocol SerDes PHY Enhances Datacenter Connectivit…

PCIe Gen4 is bringing new possibilities to servers and virtualization. The interface…

• 1 min read
PCIe Gen4 , pcie4 , 16Gbps PHY IP , SerDes , SerDes IP

The Future of High-Speed SerDes

David Axelrad, product marketing manager, SerDes IP, presents Cadence's position…

• less than a min read
PCIe Gen4 , pcie4 , SerDes , gsa

Chris Rowen is Now an IEEE Fellow

For he's a jolly good Fellow, for he's a jolly good Fellow... Effective January…

• less than a min read
Chris Rowen , IEEE Fellow , Tensilica

Word from the Source—USB-IF on USB Type-C Quality and Interoperability (Jeff Ravencraft…

In the first two parts of the interview with Jeff Ravencraft, the President and COO…

• less than a min read
USB 3.0 , cadence , Jacek Duda , USB-IF , USB , power delivery , USB 2.0 , Type-C , USB connector , USB 3.1

Word from the Source—USB-IF on USB Type-C and Alternate Modes (Jeff Ravencraft Interview…

If it wasn’t for the fact that USB has always been spelled with capital letters,…

• less than a min read
USB 3.0 , Jacek Duda , USB-IF , USB , power delivery , USB 2.0 , Type-C , USB connector , USB 3.1

Word from the Source—USB-IF on What USB-IF Is and What’s New in USB (Jeff Ravencraft…

In case you don’t know, USB Implementers Forum (USB-IF, for short) is the organization…

• less than a min read
USB 3.0 , Jacek Duda , USB-IF , USB , power delivery , USB 2.0 , Type-C , USB connector , USB 3.1

Will USB Type-C Connector Replace the 3.5mm Audio Jack?

In the past few days, there have been many posts on the Internet around Apple planning…

• 1 min read
USB 3.0 , Jacek Duda , USB-IF , USB , power delivery , USB 2.0 , Type-C , Design IP and Verification IP , USB connector , USB 3.1

50 Gbps Ethernet is on the Way

Here is my report from the most recent IEEE 802.3 standards meeting, which was held…

• 2 min read
Ethernet standards , Automotive Ethernet , IEEE 802.3 , Ethernet , Marris , 50G Ethernet

Lowering Energy Consumption in Always-on IoT Designs

As a lead design engineer on the Tensilica R&D team, Dr. Avinash Lingamneni certainly…

• 5 min read
Low Power , always on , IoT , wearable , Tensilica , mobile

Cadence Ports LPDDR4/DDR4 Combo PHY to TSMC 28HPC to Serve Rapid Adoption in Consumer…

Rapid consumer product revolution continues to be enabled by semiconductor technology…

• 1 min read
DDR4 , LPDDR4 , MemCon , LPDDR , DDR , DDR3 , LPDDR3

USB Developer Days – Turning Specifications into Applications

Each time I start working on an introductory paragraph for a new USB blog entry,…

• 2 min read
USB 3.0 , cadence , Jacek Duda , USB-IF , USB , power delivery , USB 2.0 , Type-C , USB connector , USB 3.1

Ethernet Reaches into Ever More Application Spaces

I blog from time to time about what’s new in Ethernet. I have just returned from…

• 2 min read
HDD , 802.3bs , Automotive Ethernet , Ethernet , Design IP and Verification IP , Ethernet PHYs

Cadence Announces the First MIPI I3C Verification IP!

The MIPI Alliance has developed dozens of specifications, standardizing all interfaces…

• 1 min read
Verification IP , MIPI Alliance , MIPI , Design IP and Verification IP

USB Type-C Ecosystem, Issues, and Opportunities

USB Type-C is an innovation that is transforming the electronics industry. What is…

• less than a min read
USB Type-C , DisplayPort , MCCI , Alternate Mode
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