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Custom IC Design

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  • Discussion

    ibis2subck for IBIS circuit doesn't extract analogmodel

    Category: Custom IC Design

    By JoseDuarte

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    started 5 months ago

    0 replies • 731 views
  • Discussion

    I am not able to select the layer while drawing a wire or a bus in Layout.

    Category: Custom IC Design

    By skillEater

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    •

    updated 5 months ago by RobMan

    1 replies • 2112 views
  • Discussion

    How to mute WARNING This OS does not appear to be a Cadence supported Linux configuration

    Category: Custom IC Design

    By ebecheto

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    •

    updated 5 months ago by Andrew Beckett

    1 replies • 2325 views
  • Discussion

    Modgen: How to add dummy FETs sharing diffusion without issues of marker layers?

    Category: Custom IC Design

    By sceekr

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    started 5 months ago

    0 replies • 2324 views
  • Discussion

    gsclib090 (gpdk090 standard cell library) download?

    Category: Custom IC Design

    By GS202507021424

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    •

    updated 5 months ago by RobMan

    1 replies • 2863 views
  • Discussion

    Using VCSV File in Spectre Simulation

    Category: Custom IC Design

    By aalbason

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    •

    updated 5 months ago by aalbason

    2 replies • 3402 views
  • Discussion

    Import HSpice Protected Netlist

    Category: Custom IC Design

    By JoseDuarte

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    •

    updated 5 months ago by Andrew Beckett

    1 replies • 2342 views
  • Discussion

    Quantus PVS Parasitic Extraction ERROR (LBRCXM-992)

    Category: Custom IC Design

    By RV202509139743

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    •

    started 5 months ago

    0 replies • 2062 views
  • Discussion

    Maestro ERROR for bus ">" when plot signals

    Category: Custom IC Design

    By LH202509171654

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    •

    started 5 months ago

    0 replies • 683 views
  • Discussion

    Effect of Large Voltage (1 MV) on Accuracy When Using relref=sigglobal in Spectre APS/X

    Category: Custom IC Design

    By ycyang

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    started 6 months ago

    0 replies • 924 views
  • Discussion

    Missing instance on LVS (IOs)

    Category: Custom IC Design

    By RV202509139743

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    •

    started 6 months ago

    0 replies • 2095 views
  • Discussion

    Unmatched schematic pin label

    Category: Custom IC Design

    By RV202509139743

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    •

    updated 6 months ago by RobMan

    1 replies • 2865 views
  • Discussion

    schViewToView symbol creation from systemverilog not working

    Category: Custom IC Design

    By SimhanAnalog

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    •

    updated 6 months ago by rajeshcad

    9 replies • 4681 views
  • Discussion

    .proc file for TSMC65 for the EMX simulator

    Category: Custom IC Design

    By GL202502244954

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    •

    updated 6 months ago by GL202502244954

    4 replies • 3536 views
  • Discussion

    new DRC rule(s) added to new(er) gpdk045 versions?

    Category: Custom IC Design

    By GS202507021424

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    •

    updated 6 months ago by Andrew Beckett

    1 replies • 1514 views
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