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Breakfast Bytes: The Dynamic Duo

Paul McLellan

In the DC Comics world, the "Dynamic Duo" are Batman and Robin. In the Cadence product world, they are the Palladium and Protium platforms. Or Palladium Z1 and Protium X1 to give their last names, too. The Palladium Z1 provides emulation, ...
- 7 Apr 2020
Digital Design: Innovus Implementation System: What Is Stylus UI?

VNelson
Hi Everyone,

Many of you would have heard about the Cadence Stylus Common UI and are wondering what it is and what the advantages might be to use it versus legacy UI.

The webinar answers the following questions:

Why did Cadence develop Stylus UI and what is Stylus Common UI?

How does someone invoke and use the Stylus Common UI?

What are some of the important and useful features of the Stylus Common UI?

What are the key…
- 6 Apr 2020
Analog/Custom Design: Virtuoso Meets Maxwell: What About My Die That Has No Bumps, Only Pad Shapes? How Do I Export That?

Kabir

If you have one of those Die layouts, which doesn’t have bumps, but rather uses pad shapes and labels to identify I/O locations, then you might be feeling a bit left out of all of this jazz and tango. Hence, today, I am writing to tell you that, fear not, we have a solution for your Die as well.
- 6 Apr 2020
Breakfast Bytes: From Castles and Moats to Zero-Trust Networking

Paul McLellan

The way that we handle enterprise security has changed dramatically. In the days of desktop computers and no internet, we divided the world into two: the castle, and outside, with a moat dividing the two. The moat and its associated drawbridge was t...
- 6 Apr 2020
定制IC芯片设计 : Virtuoso视频日记：“Training bytes”助推知识传播—第1部分

Dishika Majumdar

本文将以简短的方式介绍 Cadence Education Services网站，让您了解其已上线的一些在线培训课程以及Virtuoso产品特定功能相关的文章。
- 6 Apr 2020
Breakfast Bytes: Sunday Brunch Video for 5th April 2020

Paul McLellan

www.youtube.com/watch Made in my living room (camera Carey Guo) Monday: RSA: Emerging Threats, Ransomware, and IoT Tuesday: Linley Spring Processor Conference—In Your Own Living Room Wednesday: The Integrand Story Thursday: Getting to Hyperscal...
- 5 Apr 2020
Breakfast Bytes: Getting to Hyperscale Data Centers: PCs to Clouds

Paul McLellan

This post is a continuation of yesterday's post, Getting to Hyperscale Data Centers: Mainframes to Minicomputers. It continues the story from minicomputers to PCs, and then to today's environment of hyperscale data centers for "big iron...
- 3 Apr 2020
Breakfast Bytes: Getting to Hyperscale Data Centers: Mainframes to Minicomputers

Paul McLellan

Over the years, the way computing has been delivered has gone through a number of cycles. Like most things in life, this is mostly driven by underlying economics that changes over time: what is the best way to deliver everyone the computer resources...
- 2 Apr 2020
System, PCB, & Package Design : BoardSurfers: Allegro In-Design IR Drop Analysis: Essential for Optimal Power Delivery Design

Shirin Farrahi

All PCB designers know the importance of proper power delivery for successful board design. Integrated circuits need the power to turn on, and ICs with marginal power delivery will not operate reliably. Since power planes can...
- 1 Apr 2020
Breakfast Bytes: The Integrand Story

Paul McLellan

Recently, Cadence acquired Integrand Software. I wrote a post about it, Designing Radios: Integrand, a few days later. As I said there: I was actually on the list of "need-to-know" employees on the acquisition, and so I went to the Integr...
- 1 Apr 2020
定制IC芯片设计 : Virtuosity：2019年Virtuoso Place and Route的博客之旅

Parula

为了支持Virtuoso 布局和布线的各种新功能和增强功能，我们的技术专家和作家合作在 2019 年发布了一些内容丰富的博客。此博客是对Virtuoso Placement and Routing博客之旅的一个简要介绍，并为您提供了一个方便的摘要。使您在闲暇时轻松阅读这些博客
- 31 Mar 2020
Life at Cadence: Cadence Celebrates Women's History Month!

Mary Kasik

Women’s History Month recognizes the contributions of women to our history and society. It is a time to reflect on women’s achievements and encourage the continued advancement of gender equality. At Cadence, we want to recognize the women...
- 31 Mar 2020
System, PCB, & Package Design : IC Packagers: Don’t Get Stranded on Islands, Delete Them!

Tyler

No, this isn’t a Hollywood movie. We’re talking about pieces of plane shapes with no connections to them, not an idyllic private oasis in the Caribbean (sorry). Removing shape islands is something you’ve always been able to do in th...
- 31 Mar 2020
Digital Design: Are You Stuck While Synthesizing Your Design Due to Low-Power Issues? We Have the Solution!

Neha Joshi

Optimizing power can be a very convoluted and crucial process. To make design chips meet throughput goals along with optimal power consumption, you need to plan right from the beginning!
- 31 Mar 2020
Breakfast Bytes: Linley Spring Processor Conference—In Your Own Living Room

Paul McLellan

The annual Linley Spring Processor Conference is coming up next week. It was planned to be in the Santa Clara Hyatt as always, spread over two full days. Well, that's obviously not happening. Instead, the event is going virtual and is spread over fo...
- 31 Mar 2020
Breakfast Bytes: RSA: Emerging Threats, Ransomware, and IoT

Paul McLellan

I attended the recent RSA Conference in San Francisco. I wrote a post about some of the opening sessions, and the closing session, in RSA 2020: From Sulu to Penn & Teller. The Monday of the conference had some special sessions. The one I attended...
- 30 Mar 2020
System, PCB, & Package Design : BoardSurfers: Footprints for Silicon - Two Steps to Creating PCB Footprints

mrigashira

Longfellow's metaphorical footprints on the sands of time is more profound and eternal no doubt but a footprint for silicon (a form of sand isn't it?) is as important for PCB designers. So, here we will list the steps to create a fo...
- 27 Mar 2020
Breakfast Bytes: The Mythical Man-Month

Paul McLellan

This is a continuation of yesterday's post Fred Brooks "It Is a Humbling Experience to Make a Multi-Million Dollar Mistake" about Fred Brooks' experience developing the IBM System 360. Today I'll talk about the book he wro...
- 27 Mar 2020
Analog/Custom Design: Virtuosity: Are Your Layout Design Mansions Correct-by-Construction?

KomalJohar

Do you want to create designs that are correct by construction? Read along this blog to understand how you can achieve this by using Width Spacing Patterns (WSPs) in your designs. WSPs, are track lines that provide guidance for quickly creating wires. Defining WSPs that capture the width-dependent spacing rules, and snapping the pathSegs of a wire to them, ensures that the wires meet width-dependent spacing rules.
- 26 Mar 2020
Breakfast Bytes: Fred Brooks: "It Is a Humbling Experience to Make a Multi-Million Dollar Mistake"

Paul McLellan

Cadence's Intelligent System Design strategy is about designing the systems of today and tomorrow. But it is instructive to learn lessons from people who built the systems of yesterday. One of the most remarkable systems ever built was IBM's System/...
- 26 Mar 2020
Breakfast Bytes: RSA 2020: The Cryptographers' Panel

Paul McLellan

One of the big draws on the first day of the RSA Conference is always "The Cryptographers' Panel". The people on the panel vary. This year the panelists were: Whitfield Diffie of Cryptomathic, one of the inventors (with Martin Helman)...
- 25 Mar 2020
Analog/Custom Design: Virtuoso IC6.1.8 ISR10 and ICADVM18.1 ISR10 Now Available

Virtuoso Release Team

The IC6.1.8 ISR10 and ICADVM18.1 ISR10 production releases are now available for download.
- 25 Mar 2020
Academic Network: How to Get Remote Access to Cadence Academic Tools and Licenses

Anton Klotz

With the ever-evolving workplace and classroom, we know that the way we work and learn may be changing. To keep up with that change, we wanted to share some of the possibilities of accessing Cadence tools remotely. Before using any of the scenarios b...
- 24 Mar 2020
System, PCB, & Package Design : IC Packagers: Identify Your Components

Tyler

We’ve all seen bar codes and the more modern QR codes. They’re everywhere you go – items at the grocery store, advertisements and posters, even on websites. Did you know that, with the productivity toolbox in Allegro Package Designe...
- 24 Mar 2020
Breakfast Bytes: 2020 Is the Year of DDR5

Paul McLellan

I talked recently to Marc Greenberg, one of Cadence's experts on the memory market. Despite the fact that the JEDEC DDR5 standard is still under development, Marc says that: 2020 will be the year of DDR5. He is excited about it since a new DRA...
- 24 Mar 2020

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