• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. Community Forums
  3. Cadence Community
Cadence Community
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  • Site
  • Search
  • User
Find Other Members ►
Subscriptions
Get email delivery of the Cadence blog (individual posts).
  • Twitter
  • Facebook
  • LinkedIn
  • Google+

Community


Blogs
Forums
Resources

Latest Forum Posts

Visit the User Forums »

Latest Blog Posts

  • Breakfast Bytes: Why Is 5G Such a Big Deal?

    Paul McLellan
    Paul McLellan
    Yesterday was my post What Is 5G? which is the first half of my introductory look at what 5G really is, based on Ian Dennison's DAC presentation 5G Intelligent System Design. Today we pick up where that post left off. As a reminder, a 5G ne...
    • 21 Jun 2019
  • System, PCB, & Package Design : IC Packagers: Constructing Components from Manufacturing Data

    Tyler
    Tyler
    We’ve all been there. The only (or most accurate) data that we have for a component is the manufacturing data from another process. It could be a GDSII file for the top-layer metal of an IC or a Gerber film for the BGA ball pattern. If all you ...
    • 20 Jun 2019
  • System, PCB, & Package Design : BoardSurfers - Aerials and Bails: How to Split a Viastack

    Monika
    Monika

    BoardSurfers: Cadence Allegro BlogToday’s compact and powerful devices require small and high-density PCBs. Tight routing around densely packed components is thus indispensable, but cannot be achieved using conventional blind-buried and through-hole vias. Consequently, stacked vias have become an essential element of contemporary PCB designs. Stacked vias can be used in place of through-hole vias by placing multiple vias exactly over each other, taking…

    • 20 Jun 2019
  • Breakfast Bytes: What Is 5G?

    Paul McLellan
    Paul McLellan
    At the DAC theater, Cadence's Ian Dennison talked about 5G Intelligent System Design. He repeated his presentation internally at Cadence a couple of days later. Plus, I sat next to him at both CDNLive EMEA and DAC, while I signed books and he tal...
    • 20 Jun 2019
  • Verification: Master of ‘e’? Now You Can Prove It!

    teamspecman
    teamspecman

    The knowledge and experience of using Specman/e tells everyone that you have acquired profound verification methodology. But how do you showcase this knowledge to your company, colleagues, and perspective employers? To help you showcase your expertise, Cadence Training Services now offers Cadence Digital Badging.

    A certification test was created for some technologies (including Specman). When you pass the certification…

    • 19 Jun 2019
  • Digital Design: Exploring AI / Machine Learning Implementations with Stratus HLS

    SeanDart
    SeanDart

    A lot of AI design is done in software and, while much of it will remain there, increasing numbers of designs are finding their way into hardware. There are multiple reasons for this including the important goals of achieving lower power or higher performance for critical parts of the AI process. Imagine you need dramatically improved rate of object recognition in automated-driving applications.

    Implementing an AI application…

    • 19 Jun 2019
  • Breakfast Bytes: Assessing Bias in Computer Vision Systems

    Paul McLellan
    Paul McLellan
    I came across a fascinating document from Facebook on methods to assess bias in computer vision systems. At F8 2019 (their user conference), they highlighted some of the things that they are doing to address labeling bias, algorithmic bias, and more....
    • 19 Jun 2019
  • Whiteboard Wednesdays: Whiteboard Wednesdays - Passport Partners Program Expands Customer Cloud Deployment Options

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, Craig Johnson explains the purpose of the Cloud Passport Partners Program and how customers can now connect with authorized and knowledgeable service providers to tackle complex cloud deployment projects.www.youtube.com/watch

    • 18 Jun 2019
  • Breakfast Bytes: DAC: The View from Wall Street

    Paul McLellan
    Paul McLellan
    Jay Vleeschhouwer did his annual...well, he did it last year, too...View from Wall Street in the DAC Pavilion. I've known Jay for years since I spent a couple of years being the person in Cadence who was house-trained on what I could and could no...
    • 18 Jun 2019
  • Analog/Custom Design: Virtuoso IC6.1.8 ISR4 and ICADVM18.1 ISR4 Now Available

    Virtuoso Release Team
    Virtuoso Release Team
    The IC6.1.8 ISR4 and ICADVM18.1 ISR4 production releases are now available for download.
    • 17 Jun 2019
  • Breakfast Bytes: Designing a Wi-Fi HaLow Baseband in Less than Six Months

    Paul McLellan
    Paul McLellan
    At CDNLive EMEA last month, Stefan Stanic of Methods2Business (M2B) presented The Challenge of Designing a First-TIme-Right Wi-Fi HaLow Baseband in Less than Six Months. WI-FI HaLow is a standard for superior IoT connectivity. Links can be up to 1km,...
    • 17 Jun 2019
  • System, PCB, & Package Design : DATA Pulse: Know How to Effectively Manage Part Obsolescence (Part 1 of 2)

    Auromala
    Auromala

     This is the first of a two-part blog post on managing part obsolescence using Allegro® EDM applications.

    In the midst of a periodic bout of decluttering the house, my niece stumbled across some cassettes and looked at them like they were from some prehistoric age. How could I convey the importance of the audio cassette to my niece? She's used to iTunes, YouTube, Spotify, and goodness knows what else. I remember cassettes…

    • 16 Jun 2019
  • Breakfast Bytes: Sunday Brunch Video for 16th June 2019

    Paul McLellan
    Paul McLellan
    https://youtu.be/CaIc3qOakxs Made at building 9 elevator (camera Sean) Monday: Cadence Cloud Passport Partner Program Tuesday: Making Trouble in Las Vegas Wednesday: Paris Air Show Thursday: Ericsson Using Virtual Platforms for Dynamic Analysis ...
    • 16 Jun 2019
  • PCB、IC封装:设计与仿真分析: 刚柔板装配与多板系统装配有何不同?

    TeamAllegro
    TeamAllegro
    通常我们考虑多层电路板PCB设计时,往往会想到服务器环境中的电路板机架或游戏平台组合。但是如果我们的典型刚性电路板并不适合多层电路板使用的实体机壳怎么办?我们会愿意付额外的价格来使用柔性电路板吗?如果我们可以将这两者的优点兼而有之呢? 本文中,我们将介绍刚柔组合的优点、性质以及如何更好地满足多层电路板的PCB设计需求。 什么是刚柔结合的PCB? 在标准多层电路板PCB设计中,我们采用电路板概念,将不同功能电路划分到较小的电路板上,并采用各种互连线路将系统放进一个外壳内。 这种标准方法的问题在于...
    • 14 Jun 2019
  • Single-Stop Learning Resource for JasperGold  Formal Verification Platform

    Learning and Support: Single-Stop Learning Resource for JasperGold Formal Verification Platform

    SumeetAggarwal
    SumeetAggarwal
    While Our next-generation cloud-ready JasperGold® Formal Verification Platform features machine learning technology and core formal technology enhancements across all JasperGold apps, and provides industry-leading performance, capacity, usability...
    • 14 Jun 2019
  • Breakfast Bytes: Cell-Aware Test: Research Cooperation Between Cadence, imec, and TU Eindhoven...Now Shipping in Modus DFT Software Solution

    Paul McLellan
    Paul McLellan
    At CDNLive EMEA, Zhan Gao presented her results on cell-aware test. This is the paper she presented at the Latin American Test Symposium (LATS) in Santiago, Chile in March and won the Best Paper award there (see Anton's post on the Academic Network b...
    • 14 Jun 2019
  • Breakfast Bytes: Ericsson Using Virtual Platforms for Dynamic Analysis

    Paul McLellan
    Paul McLellan
    At CDNLive EMEA last month, Ola Dahl of Ericsson presented Dynamic Software Analysis in Virtual Platforms. He described his job as "I work in the 5G network business doing basestations and radios." They have a virtual platform for one of th...
    • 13 Jun 2019
  • Academic Network: Europractice and Cadence – A Long Fruitful Partnership

    Anton Klotz
    Anton Klotz
    Those who have studied microelectronics in Europe since 1989 have certainly heard about Europractice and have probably used EDA technologies provided by them. Though most refer to Europractice as an organization, it is actually an EU-funded project, ...
    • 12 Jun 2019
  • Verification: Specman: Python Is here!

    teamspecman
    teamspecman

    Do you know from where Python technology gets its name? It is not from the snake, it is named after the Monty Python comedy group. And indeed, one of the main guidelines behind it is to be fun to use (check out the Zen of Python). Therefore, Python is intuitive, readable, and easy to learn - all of these make it not only fun to use but also highly productive. Does this sound familiar? If you are an e user, it should. Apparently…

    • 12 Jun 2019
  • Breakfast Bytes: Paris Air Show

    Paul McLellan
    Paul McLellan
    Next week it is the Paris Air Show, the biggest trade show in aerospace and defense. Cadence will be attending for the first time. The show is held at Le Bourget Airport, which you've probably never heard of. Although it was Paris's first air...
    • 12 Jun 2019
  • Whiteboard Wednesdays: Whiteboard Wednesdays - Cadence Cloud - Fast, Painless, Proven Solutions for Cloud-Based Design

    References4U
    References4U

    In this week's Whiteboard Wednesdays video, Tom Hackett continues his discussion of the unique needs of different types of companies and introduces the specific Cadence® Cloud solutions designed to meet those needs.

    https://youtu.be/iTLy4sYQp1Q

    • 11 Jun 2019
  • System, PCB, & Package Design : IC Packagers: A Classic Revisited - Ball Map Spreadsheets

    Tyler
    Tyler
    Interfaces to the major spreadsheet commands from OpenOffice, Microsoft, Google, and others are becoming more common in EDA, Cadence® SiP has had a great interface since early in the 16.6 release. You, our users, continue to find creative new use...
    • 11 Jun 2019
  • System, PCB, & Package Design : BoardSurfers: Text Labels and Film Views Help Intelligent Designers

    Tyler
    Tyler

    BoardSurfers: Cadence Allegro BlogLast time, I talked about color and visibility as it relates to simplifying your design canvas display to make your work easier. Today, we take the next step forward: using your artwork films to drive what you see on screen, as well as dynamic text labels to help you find objects. We’ll close out with a reminder of how to recycle the time you’ve spent setting up one design across all your designs.

    Artwork…
    • 11 Jun 2019
  • Breakfast Bytes: Making Trouble in Las Vegas

    Paul McLellan
    Paul McLellan
    For years John Cooley has organized what is called the Cooley's DAC Troublemaker Panel. This year, the participants (troublemakers?) were: Naveed Sherwani, CEO of SiFive (a RISC-V implementation company) Joe Costello of Montana (creati...
    • 11 Jun 2019
  • Analog/Custom Design: Virtuosity: Device-Level Routing for Advanced Nodes - Using Finish Trunk

    Parula
    Parula
    The first blog of the series talks about features that are not new but capabilities that are ground-breaking and can support your device-level routing requirements for advanced nodes with the use of the Finish Trunk command.
    • 10 Jun 2019
<>
Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information